公开(公告)号：US07904618B2

公开(公告)日：2011-03-08

申请号：US11996359

申请日：2006-05-31

Applicant: Keisuke Inoue ,  Yasukichi Ohkawa

Inventor： Keisuke Inoue ,  Yasukichi Ohkawa

IPC: G06F3/00

CPC classification number: G06F5/10 ,  G06F9/544

Abstract: A buffer is provided with a leading pointer and a following pointer. A bitmap in which two bits are assigned to each block is updated to retain which states blocks are in, busy, write-completed, or read-completed. Under the constraint that the two pointers move in the same direction and do not pass each other: after the block designated by the leading pointer starts to be written, the leading pointer is moved to a next block only if the next block is in the read-completed state; and after the block designated by the following pointer starts to be read, the following pointer is moved to a next block only if the next block is in the write-completed state.

Abstract translation: 缓冲区中提供了一个前导指针和一个后续指针。 更新其中分配给每个块的两个位的位图，以保持块处于，忙，写完成或读完成状态。 在两个指针在相同方向移动并且彼此不通过的限制下：在由前导指针指定的块开始写入之后，只有当下一个块在读取时，才将前导指针移动到下一个块 完成状态 并且在由以下指针指定的块开始被读取之后，仅当下一个块处于写入完成状态时，才将下一个指针移动到下一个块。

公开(公告)号：US07741759B2

公开(公告)日：2010-06-22

申请号：US11922007

申请日：2006-06-28

Applicant: Hiroyuki Sugiyama ,  Keisuke Inoue ,  Hitoshi Kishita ,  Hideki Shimoi ,  Hiroyuki Kyushima

Inventor： Hiroyuki Sugiyama ,  Keisuke Inoue ,  Hitoshi Kishita ,  Hideki Shimoi ,  Hiroyuki Kyushima

IPC: H01J43/00

CPC classification number: H01J43/28 ,  H01J5/24 ,  H01J9/26

Abstract: A photomultiplier tube 1 is an electron tube comprising an envelope 5 including a frame 3b having at least one end part formed with an opening and an upper substrate 2 airtightly joined to the opening, and a photocathode 6 contained within the envelope 5, the photocathode 6 emitting a photoelectron into the envelope 5 in response to light incident thereon from the outside; wherein multilayer metal films 10b, 10a each constituted by a metal film made of titanium, a metal film made of platinum, and a metal film made of gold laminated in this order are formed at the opening and the joint part between the upper substrate 2 and opening; and wherein the frame 3b and upper side substrate 2 are joined to each other by holding a joint layer 14 containing indium between the respective multilayer metal films 10b, 10a.

Abstract translation: 光电倍增管1是包括外壳5的电子管，外壳5包括框架3b，框架3b具有形成有开口的至少一个端部和与开口气密地接合的上基板2，以及容纳在外壳5内的光电阴极6，光电阴极6 响应于从外部入射到其上的光，将光电子发射到信封5中; 其中，在上部基板2和第二基板2之间的开口部和接合部形成有由钛构成的金属膜，铂金属膜和金制金属膜构成的多层金属膜10b，10a， 开口 并且其中框架3b和上侧基板2通过在各个多层金属膜10b，10a之间保持包含铟的接合层14而彼此接合。

公开(公告)号：US07680972B2

公开(公告)日：2010-03-16

申请号：US11345893

申请日：2006-02-02

Applicant: Keisuke Inoue ,  Masahiro Yasue

Inventor： Keisuke Inoue ,  Masahiro Yasue

IPC: G06F13/24

CPC classification number: G06F13/24

Abstract: A system and method is provided for improved interrupt handling via a micro interrupt handler. Upon an interrupt signal being sent to a processor running a task, a first part of the running task is stored to system memory via direct memory access. A micro interrupt handler is read from the system memory to begin handling the interrupt signal. A second part of the running task is stored to system memory via direct memory access. The micro interrupt handler is executed and read and the previous running task is read from direct memory access and restored. Long lag times for interrupt processing and inefficiencies in processor queues are avoided.

Abstract translation: 提供了一种通过微中断处理程序改进中断处理的系统和方法。 当中断信号被发送到运行任务的处理器时，运行任务的第一部分通过直接存储器访问被存储到系统存储器。 从系统存储器读取微型中断处理程序，开始处理中断信号。 运行任务的第二部分通过直接内存访问存储到系统内存。 执行和读取微中断处理程序，并从直接存储器访问读取先前运行的任务并恢复。 避免了中断处理的长滞后时间和处理器队列的低效率。

公开(公告)号：US20090128559A1

公开(公告)日：2009-05-21

申请号：US12211521

申请日：2008-09-16

Applicant: Jun Doi ,  Keisuke Inoue ,  Atsuhshi Yamada

Inventor： Jun Doi ,  Keisuke Inoue ,  Atsuhshi Yamada

IPC: G06T17/10 ,  G06T11/20

CPC classification number: G06T17/10

Abstract: Enables efficient correction of topological consistency of an input three-dimensional shape approximated in a spatial graph. Structured mesh generation systems of the present invention include: a topology determination apparatus for reading shape data from a shape data storage device to determine topological consistency and outputting data for solving a problem about topological consistency; a decomposable shape generation apparatus for reading the data outputted by the topology determination apparatus, changing a constraint condition of an integer programming problem solver to execute a shape correction process and outputting corrected shape data; and a structured mesh generation apparatus for reading the corrected shape data to generate a structured mesh.

Abstract translation: 实现空间图中近似的输入三维形状的拓扑一致性的有效校正。 本发明的结构化网格生成系统包括：拓扑确定装置，用于从形状数据存储装置读取形状数据，以确定拓扑一致性并输出用于解决拓扑一致性问题的数据; 用于读取由拓扑确定装置输出的数据的分解形状生成装置，改变整数规划问题求解器的约束条件以执行形状校正处理并输出校正后的形状数据; 以及用于读取校正后的形状数据以生成结构化网格的结构化网格生成装置。

公开(公告)号：US07486292B2

公开(公告)日：2009-02-03

申请号：US10114729

申请日：2002-04-02

Applicant: Takayuki Itoh ,  Keisuke Inoue

Inventor： Takayuki Itoh ,  Keisuke Inoue

IPC: G06T11/20

CPC classification number: G06T11/206 ,  H04L41/12 ,  H04L41/22

Abstract: The present invention provides methods, apparatus and systems to improve the quality of the arrangement of nodes in a graphics display, for which a graphics image consisting of nodes and arcs is generated, and to increase the processing speed. Nodes are sequentially added and arranged in a display space, and each time a new node is added, a predetermined dynamic model is employed to correct the locations of the new node and of nodes that were previously arranged in the display space. The nodes are arranged beginning with a node having numerous adjacent arcs, so that the nodes that are arranged early in the process are located nearer the center of the display space. In the graphics image thus formed in the display space, arcs located within a predetermined distance of a specific node are curved so they detour around the node.

公开(公告)号：US20080263663A1

公开(公告)日：2008-10-23

申请号：US12145067

申请日：2008-06-24

Applicant: Tsuyoshi Ide ,  Keisuke Inoue ,  Toshiyuki Yamane ,  Hironori Takeuchi

Inventor： Tsuyoshi Ide ,  Keisuke Inoue ,  Toshiyuki Yamane ,  Hironori Takeuchi

IPC: G06F21/00

CPC classification number: G06F17/30705

Abstract: Properly detects an anomaly on the basis of directional data that are obtained in sequence from a monitored object. An anomaly detecting method includes: sequentially generating directional data indicating a feature of each piece of monitored data correspondingly to the monitored data which are input in sequence; calculating the dissimilarity of the directional data to a reference vector; updating a moment of the distribution of the dissimilarity appearing when the directional data is modeled with a multi-dimensional probability distribution, based on the moment already corresponding to the monitored data; calculating a parameter determining the variance of the multi-dimensional probability distribution, on the basis of the moment; calculating a threshold of the dissimilarity on the basis of the multi-dimensional probability distribution the variance of which is determined by the parameter; and detecting an anomaly in the monitored data that corresponds to the dissimilarity if the dissimilarity exceeds the threshold.

Abstract translation: 根据从被监视对象顺序获得的方向数据，正确检测到异常。 异常检测方法包括：依次输出指示每一段被监视数据的特征的方向数据，与监控数据相对应地依次输入; 计算方向数据与参考矢量的不相似性; 基于已经对应于所监视的数据的时刻，更新当使用多维概率分布建模定向数据时出现的不相似性的分布的时刻; 根据时刻计算确定多维概率分布的方差的参数; 根据参数确定其方差的多维概率分布计算不相似性的阈值; 以及如果所述不相似度超过所述阈值，则检测所述监视数据中与所述不相似度相对应的异常。

公开(公告)号：US07428619B2

公开(公告)日：2008-09-23

申请号：US11037864

申请日：2005-01-18

Applicant: Masahiro Yasue ,  Keisuke Inoue

Inventor： Masahiro Yasue ,  Keisuke Inoue

IPC: G06F13/16 ,  G06F12/00

CPC classification number: G06F9/526

Abstract: A synchronization scheme is provided for a multiprocessor system. In particular, a processor includes a buffer sync controller. The buffer sync controller is operative to allow or deny access by a subprocessor to shared data in a shared memory, such that a processor seeking to write data into or read data from the shared memory must ascertain certain shared parameter data processed by the buffer sync controller.

Abstract translation: 为多处理器系统提供同步方案。 特别地，处理器包括缓冲器同步控制器。 缓冲器同步控制器用于允许或拒绝子处理器对共享存储器中的共享数据的访问，使得寻求将数据写入共享存储器或从共享存储器读取数据的处理器必须确定由缓冲器同步控制器处理的某些共享参数数据 。

公开(公告)号：US20070129912A1

公开(公告)日：2007-06-07

申请号：US11674145

申请日：2007-02-13

Applicant: Keisuke Inoue ,  Tsuyoshi Ide

Inventor： Keisuke Inoue ,  Tsuyoshi Ide

IPC: G21C17/00

CPC classification number: G05B23/0232 ,  G05B2219/32187 ,  Y02P90/22

Abstract: Provides a diagnostic apparatus for diagnosing a measured object based on time-series data of a plurality of parameters measured from the measured object. An example of an apparatus includes a change-point score calculating portion for calculating a time-series change-point score with which each of the plurality of parameters changes according to passage of time based on the time-series data on the parameter, a change-point correlation calculating portion for calculating a change-point correlation indicating strength by which each of the plurality of parameters is associated with each of other parameters based on the change-point scores of the parameter and the other parameter, and a parameter outputting portion for outputting a set of parameters of which calculated degrees of associations are higher than a predetermined reference change-point correlation as a set of mutually strongly associated parameters.

Abstract translation: 提供一种诊断装置，用于根据从测量对象测量的多个参数的时间序列数据来诊断测量对象。 一种装置的例子包括：变化点分数计算部分，用于根据参数的时间序列数据，计算多个参数中的每个参数根据时间的变化而变化的时间序列变化点得分，变化点分数计算部分， 点相关计算部分，用于基于参数和另一参数的变化点得分，计算指示多个参数中的每一个与其他参数中的每一个相关联的强度的变化点相关性;以及参数输出部分， 将相关联的计算度的一组参数作为相互强烈相关的参数的集合输出，所述一组参数高于预定的参考变化点相关性。

公开(公告)号：US20060174169A1

公开(公告)日：2006-08-03

申请号：US11045767

申请日：2005-01-28

Applicant: Keisuke Inoue ,  Tatsuya Iwamoto

Inventor： Keisuke Inoue ,  Tatsuya Iwamoto

IPC: G06F11/00

CPC classification number: G06F13/28

Abstract: Direct memory access is provided for each member of a group of IO devices organized into groups. Direct memory access for each IO device is performed in a predetermined order based on the predetermined groups, and may be completed by notification by an interrupt request. A predetermined time delay may be specified between each memory access by each IO device of a predetermined group.

Abstract translation: 为组织的组的一组IO设备的每个成员提供直接存储器访问。 基于预定组，以预定的顺序执行每个IO设备的直接存储器访问，并且可以通过中断请求的通知来完成。 可以在预定组的每个IO设备的每个存储器访问之间指定预定的时间延迟。

公开(公告)号：US20060155792A1

公开(公告)日：2006-07-13

申请号：US11031461

申请日：2005-01-07

Applicant: Keisuke Inoue ,  Masahiro Yasue

Inventor： Keisuke Inoue ,  Masahiro Yasue

IPC: G06F12/00 ,  G06F17/30

CPC classification number: G06F12/023 ,  G06F12/0284

Abstract: Methods and apparatus provide for associating memory allocation table (MAT) entries with nodes in a binary tree such that the nodes and the entries are grouped into hierarchical levels, each entry including status information; associating the nodes and the entries with segments of a shared memory of a multi-processor system such that higher level nodes and entries are associated with larger numbers of segments of the shared memory and lower level nodes and entries are associated with smaller numbers of segments of the shared memory; initializing the MAT such that the status information of at least a plurality of entries indicates that the associated segment or segments of the shared memory are available for reservation; and selecting one entry in a group of entries in the MAT at a level corresponding to a desired size of the shared memory to be reserved.

Abstract translation: 方法和装置提供将存储器分配表（MAT）条目与二进制树中的节点相关联，使得节点和条目被分组成层级，每个条目包括状态信息; 将节点和条目与多处理器系统的共享存储器的段相关联，使得较高级节点和条目与共享存储器的较大数量的段相关联，并且较低级节点和条目与较少数量的段 共享内存; 初始化MAT，使得至少多个条目的状态信息指示共享存储器的相关联的段或段可用于预留; 以及在与要保留的共享存储器的期望大小相对应的级别的MAT中选择一组条目中的一个条目。