Andrographolide and its derivatives as TNF-alpha antagonists
    11.
    发明申请
    Andrographolide and its derivatives as TNF-alpha antagonists 审中-公开
    穿心莲内酯及其衍生物作为TNF-α拮抗剂

    公开(公告)号:US20060106098A1

    公开(公告)日:2006-05-18

    申请号:US10992180

    申请日:2004-11-18

    CPC classification number: C07D307/32

    Abstract: The present invention relates to andrographolide and its derivatives of the general formula (I), as well as the stereoisomers and salts of andrographolide and the derivatives. Andrographolide and its derivatives represented by general formula (I) defined above are useful as TNFα (tumor necrosis factor alpha) antagonists or inhibitors which have inhibitory effect on the binding of TNFα to TNF-RI. Andrographolide exhibited inhibitor activity with IC50 values 60 μM on L929 cell proliferation/cytotoxicity assay without cell cytotoxicity. In addition, in the animal model test of collagen-induced arthritis, andrographolide exhibited 50% paw edema. Andrographolide and its derivatives are promising sources with high TNFα-inhibiting or antagonizing activity.

    Abstract translation: 本发明涉及通式(I)的穿心莲内酯及其衍生物,以及穿心莲内酯及其衍生物的立体异构体和盐。 由上述通式(I)表示的穿心莲内酯及其衍生物可用作TNFalpha(肿瘤坏死因子α)拮抗剂或对TNFα与TNF-RI结合具有抑制作用的抑制剂。 穿心莲内酯在不具有细胞毒性的L929细胞增殖/细胞毒性测定中显示具有IC 50 N值60μM的抑制剂活性。 此外,在胶原诱导关节炎的动物模型试验中,穿心莲内酯显示50%的爪水肿。 穿心莲内酯及其衍生物是具有高TNFα抑制或拮抗活性的有希望的来源。

    Ion implant method for forming trench isolation for integrated circuit
devices
    12.
    发明授权
    Ion implant method for forming trench isolation for integrated circuit devices 失效
    用于集成电路器件形成沟槽隔离的离子注入方法

    公开(公告)号:US6004864A

    公开(公告)日:1999-12-21

    申请号:US30195

    申请日:1998-02-25

    CPC classification number: H01L21/76237 H01L21/761 Y10S148/05

    Abstract: A method is described for forming trench isolation for integrated circuits on silicon wafers by selectively doping the trench regions by ion implantation and then etching these areas with a wet chemical etch. A dopant such as boron, is implanted in a sequence of energies and doses to provide a desired trench profile of heavily doped silicon. The implanted silicon etches far more rapidly than the surrounding silicon and is readily etched out forming a trench. The concentration of dopant diminishes rapidly in the periphery of the implanted region. As the etch front approaches the periphery, the silicon etch rate, likewise diminishes and the etch can be quenched to leave a uniform surface layer of enhanced boron concentration which lines the resultant trench to form an effective channel stop. Wet etched trenches provide advantages over trenches formed by RIE including smooth rounded trench profiles which reduce stress. In addition, trenches having widths below 0.25 microns and essentially vertical walls can readily be formed.

    Abstract translation: 描述了一种用于通过用离子注入选择性地掺杂沟槽区域然后用湿化学蚀刻来蚀刻这些区域来在硅晶片上形成用于集成电路的沟槽隔离的方法。 掺杂剂如硼,以能量和剂量的顺序注入,以提供重掺杂硅的期望的沟槽轮廓。 植入的硅比周围的硅蚀刻得更快,并且容易地蚀刻形成沟槽。 掺杂剂的浓度在注入区域的周围快速减少。 随着蚀刻前沿接近外围,硅蚀刻速率同样减小,蚀刻可以淬火以留下增强的硼浓度的均匀表面层,其中所述沟槽形成有效的通道阻挡。 湿蚀刻沟槽提供了优于由RIE形成的沟槽的优点,包括减少应力的平滑圆形沟槽轮廓。 此外,宽度小于0.25微米的沟槽和基本垂直的壁可容易地形成。

    Semiconductor substrate dry cleaning method
    13.
    发明授权
    Semiconductor substrate dry cleaning method 失效
    半导体衬底干洗方法

    公开(公告)号:US5704986A

    公开(公告)日:1998-01-06

    申请号:US529635

    申请日:1995-09-18

    Abstract: A method for cleaning a semiconductor substrate. Introduced into a semiconductor substrate processing chamber is a semiconductor substrate. The semiconductor substrate and the semiconductor substrate processing chamber are maintained at a temperature not exceeding about 800 degrees centigrade. Introduced substantially simultaneously with the semiconductor substrate into the semiconductor substrate processing chamber is a low flow of a first oxidant gas. Introduced into the semiconductor substrate processing chamber immediately subsequent to the low flow of the first oxidant gas is a high flow of a second oxidant gas. Introduced into the semiconductor wafer processing chamber no earlier than the high flow of the second oxidant gas is a flow of a chlorine containing getter material. The semiconductor substrate is exposed to the high flow of the second oxidant gas and the flow of the chlorine containing getter material at a temperature not exceeding 800 degrees centigrade for a time period sufficient to remove organic contaminant residues and metal ion contaminant residues from the surface of the semiconductor substrate.

    Abstract translation: 一种清洗半导体衬底的方法。 引入到半导体衬底处理室中的是半导体衬底。 半导体衬底和半导体衬底处理室保持在不超过约800摄氏度的温度。 与半导体基板基本上同时引入到半导体基板处理室中的是第一氧化剂气体的低流量。 在第一氧化剂气体的低流量之后立即引入到半导体衬底处理室中是高流量的第二氧化剂气体。 不迟于第二氧化剂气体的高流量而引入到半导体晶片处理室中是含氯吸气材料的流动。 将半导体衬底暴露于第二氧化剂气体的高流量和含氯吸气材料的流动温度不超过800摄氏度的时间内足以从有机污染物残留物和金属离子污染物残留物的表面去除 半导体衬底。

    SEMICONDUCTOR DEVICE CLEANING METHOD
    14.
    发明申请
    SEMICONDUCTOR DEVICE CLEANING METHOD 审中-公开
    半导体器件清洗方法

    公开(公告)号:US20130068248A1

    公开(公告)日:2013-03-21

    申请号:US13233568

    申请日:2011-09-15

    CPC classification number: H01L21/02057 H01L21/67051

    Abstract: The present disclosure provides a method including providing a chamber having a first inlet and a second inlet. A solution of a de-ionized (DI) water and an acid (e.g., a dilute acid) is provided to the chamber via the first inlet. A carrier gas (e.g., N2) is provided to the chamber via the second inlet. The solution and the carrier gas are in the chamber and then from the chamber onto a single semiconductor wafer. In an embodiment, the solution includes a dilute HCl and DI water.

    Abstract translation: 本公开提供了一种方法,包括提供具有第一入口和第二入口的室。 通过第一入口向腔室提供去离子(DI)水和酸(例如稀酸)的溶液。 载气(例如,N2)经由第二入口提供给腔室。 溶液和载气在室中,然后从室到单个半导体晶片。 在一个实施方案中,溶液包括稀HCl和去离子水。

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