PROCESSOR USAGE ACCOUNTING USING WORK-RATE MEASUREMENTS
    11.
    发明申请
    PROCESSOR USAGE ACCOUNTING USING WORK-RATE MEASUREMENTS 审中-公开
    处理者使用工资率计量的会计

    公开(公告)号:US20120079500A1

    公开(公告)日:2012-03-29

    申请号:US12893748

    申请日:2010-09-29

    IPC分类号: G06F9/46

    摘要: Accounting charges are assigned to workloads by measuring a relative use of computing resources by the workloads, then scaling the results using determined work-rate for the corresponding workload. Usage metrics for the individual resources may be selectable for the resources being measured and the work-rates may be determined from an analytical model or from empirical model that determines work-rates from an indication of processor throughput. Under single workload conditions on a platform, or other suitable conditions, a workload type may be used to select the particular usage metrics applied for the various resources.

    摘要翻译: 通过测量工作负载的计算资源的相对使用,然后使用确定的相应工作负载工作率来缩放结果,将会计费用分配给工作负载。 可以针对被测量的资源选择各个资源的使用度量,并且可以从分析模型或经验模型确定工作速率,该经验模型根据处理器吞吐量的指示来确定工作率。 在平台上的单个工作负载条件或其他合适的条件下,可以使用工作负载类型来选择应用于各种资源的特定使用度量。

    Apparatus and method for autonomically suspending and resuming logical partitions when I/O reconfiguration is required
    13.
    发明授权
    Apparatus and method for autonomically suspending and resuming logical partitions when I/O reconfiguration is required 有权
    需要I / O重新配置时,自动暂停和恢复逻辑分区的装置和方法

    公开(公告)号:US08055838B2

    公开(公告)日:2011-11-08

    申请号:US10624808

    申请日:2003-07-22

    IPC分类号: G06F13/10

    CPC分类号: G06F9/5077

    摘要: A partition manager includes an I/O reconfiguration mechanism and a logical partition suspend/resume mechanism that work together to perform autonomic I/O reconfiguration in a logically partitioned computer system. When I/O reconfiguration is required, the affected logical partitions are suspended, the I/O is reconfigured, and the affected logical partitions are resumed. Because the logical partitions are suspended during I/O reconfiguration, any ghost packet that may occur when the I/O is reconfigured is ignored.

    摘要翻译: 分区管理器包括I / O重新配置机制和逻辑分区挂起/恢复机制,其协同工作以在逻辑分区的计算机系统中执行自主I / O重新配置。 当需要I / O重新配置时,受影响的逻辑分区将被挂起,重新配置I / O,并恢复受影响的逻辑分区。 因为逻辑分区在I / O重新配置期间被挂起,所以当I / O被重新配置时可能发生的任何ghost数据包被忽略。

    Selectively invalidating entries in an address translation cache
    15.
    发明授权
    Selectively invalidating entries in an address translation cache 有权
    选择性地使地址转换缓存中的条目无效

    公开(公告)号:US07822942B2

    公开(公告)日:2010-10-26

    申请号:US12054538

    申请日:2008-03-25

    IPC分类号: G06F13/00

    摘要: An apparatus and method selectively invalidate entries in an address translation cache instead of invalidating all, or nearly all, entries. One or more translation mode bits are provided in each entry in the address translation cache. These translation mode bits may be set according to the addressing mode used to create the cache entry. One or more “hint bits” are defined in an instruction that allow specifying which of the entries in the address translation cache are selectively preserved during an invalidation operation according to the value(s) of the translation mode bit(s). In the alternative, multiple instructions may be defined to preserve entries in the address translation cache that have specified addressing modes. In this manner, more intelligence is used to recognize that some entries in the address translation cache may be valid after a task or partition switch, and may therefore be retained, while other entries are invalidated.

    摘要翻译: 一种装置和方法选择性地使地址转换高速缓存中的条目无效,而不是使所有或几乎所有条目无效。 在地址转换高速缓存中的每个条目中提供一个或多个翻译模式位。 可以根据用于创建高速缓存条目的寻址模式来设置这些转换模式位。 在指令中定义一个或多个“提示位”,该指令允许根据翻译模式位的值来指定在无效操作期间选择性地保留地址转换高速缓存中的哪些条目。 在替代方案中,可以定义多个指令以保留具有指定寻址模式的地址转换高速缓存中的条目。 以这种方式,使用更多的智能来识别地址转换高速缓存中的一些条目在任务或分区切换之后可能是有效的,并且因此可以被保留,而其他条目无效。

    Replacing a failing physical processor
    16.
    发明授权
    Replacing a failing physical processor 有权
    更换故障物理处理器

    公开(公告)号:US07765428B2

    公开(公告)日:2010-07-27

    申请号:US12330087

    申请日:2008-12-08

    IPC分类号: G06F11/00

    摘要: Replacing a failing physical processor in a computer supporting multiple logical partitions, where the logical partitions include dedicated partitions and shared processor partitions, the dedicated partitions are supported by virtual processors having assigned physical processors, and the shared processor partitions are supported by pools of virtual processors. The pools of virtual processors have assigned physical processors. Embodiments operate generally by assigning priorities to the dedicated partitions and to the pools of virtual processors; detecting a checkstop of a failing physical processor; retrieving the failing physical processor's state; replacing by a hypervisor the failing physical processor with a replacement physical processor assigned to a dedicated partition or pool, which dedicated partition or pool has the lowest priority among the priorities of the dedicated partitions and pools; and assigning the retrieved state of the failing physical processor as the state of the replacement physical processor.

    摘要翻译: 在支持多个逻辑分区(其中逻辑分区包括专用分区和共享处理器分区)的计算机中替换故障物理处理器,专用分区由具有分配的物理处理器的虚拟处理器支持,并且共享处理器分区由虚拟处理器池支持 。 虚拟处理器池分配了物理处理器。 实施例通常通过将优先级分配给专用分区和虚拟处理器池来进行操作; 检测故障物理处理器的检查停止; 检索故障物理处理器的状态; 由管理程序替换故障物理处理器,其中分配给专用分区或池的替换物理处理器,专用分区或池在专用分区和池的优先级中具有最低优先级; 以及将所述故障物理处理器的检索状态分配为所述替换物理处理器的状态。

    System quiesce for concurrent code updates
    17.
    发明授权
    System quiesce for concurrent code updates 有权
    系统暂停并发代码更新

    公开(公告)号:US07698700B2

    公开(公告)日:2010-04-13

    申请号:US10418566

    申请日:2003-04-17

    IPC分类号: G06F9/44 G06F9/445

    CPC分类号: G06F8/656

    摘要: Methods, systems, and articles of manufacture for allowing an update to an executable component, such as a logical partitioning operating system, running on a computer system without requiring a reboot (or IPL) of the computer system are provided. Processors or tasks executing in a portion of code being updated may be forced to a known or “quiesced” state (e.g., designated wait points) before applying the update. If any of the processors or tasks are not in their quiesced state, the update is not applied or may be rescheduled for a later time, in an effort to allow the system to reach the quiesced state.

    摘要翻译: 提供了用于允许更新在计算机系统上运行的可执行组件(诸如逻辑分区操作系统)的方法,系统和制品,而不需要计算机系统的重启(或IPL)。 在更新的代码的一部分中执行的处理器或任务可能在应用更新之前被强制为已知或“静态”状态(例如,指定的等待点)。 如果处理器或任务中的任何一个处于静止状态,则不会更新该应用程序,或者可能会在稍后的时间内重新安排更新程序,以使系统达到静默状态。

    Power-aware line intervention for a multiprocessor directory-based coherency protocol
    18.
    发明申请
    Power-aware line intervention for a multiprocessor directory-based coherency protocol 审中-公开
    基于多处理器目录的一致性协议的功率感知线路干预

    公开(公告)号:US20090138220A1

    公开(公告)日:2009-05-28

    申请号:US11946551

    申请日:2007-11-28

    IPC分类号: G01R21/02 G06F12/08

    CPC分类号: G06F12/0817 Y02D10/13

    摘要: A directory-based coherency method, system and program are provided for intervening a requested cache line from a plurality of candidate memory sources in a multiprocessor system on the basis of the sensed temperature or power dissipation value at each memory source. By providing temperature or power dissipation sensors in each of the candidate memory sources (e.g., at cores, cache memories, memory controller, etc.) that share a requested cache line, control logic may be used to determine which memory source should source the cache line by using the power sensor signals to signal only the memory source with acceptable power dissipation to provide the cache line to the requester.

    摘要翻译: 基于目录的一致性方法,系统和程序被提供用于基于每个存储器源处的感测温度或功率耗散值来在多处理器系统中从多个候选存储器源插入所请求的高速缓存行。 通过在共享所请求的高速缓存行的每个候选存储器源(例如,在内核,高速缓冲存储器,存储器控制器等)中提供温度或功率耗散传感器,可以使用控制逻辑来确定哪个存储器源应该来源于高速缓存 通过使用功率传感器信号仅以可接受的功率消耗信号通知存储器源,以向请求器提供高速缓存线。

    DEALLOCATION OF COMPUTER DATA IN A MULTITHREADED COMPUTER

    公开(公告)号:US20080134188A1

    公开(公告)日:2008-06-05

    申请号:US11970816

    申请日:2008-01-08

    IPC分类号: G06F9/46

    摘要: An apparatus, program product and method support the deallocation of a data structure in a multithreaded computer without requiring the use of computationally expensive semaphores or spin locks. Specifically, access to a data structure is governed by a shared pointer that, when a request is received to deallocate the data structure, is initially set to a value that indicates to any thread that later accesses the pointer that the data structure is not available. In addition, to address any thread that already holds a copy of the shared pointer, and thus is capable of accessing the data structure via the shared pointer after the initiation of the request, all such threads are monitored to determine whether any thread is still using the shared pointer by determining whether any thread is executing program code that is capable of using the shared pointer to access the data structure. Once this condition is met, it is ensured that no thread can potentially access the data structure via the shared pointer, and as such, the data structure may then be deallocated.