公开(公告)号：US08378740B2

公开(公告)日：2013-02-19

申请号：US12980724

申请日：2010-12-29

Applicant: Nitin Gupta

Inventor： Nitin Gupta

IPC: G05F1/10

CPC classification number: H03K19/018507 ,  H03K19/00384

Abstract: A switching circuit includes a source follower current mirror having an input, an output, a first source terminal, a bias terminal, and a second source terminal; a current source coupled to the input of the current mirror; an output terminal coupled to the output of the current mirror; a first bias transistor coupled to the first source terminal; a second bias transistor coupled to bias terminal of the current mirror; and a driver transistor coupled to the second source terminal. An input transistor in the current mirror is sized such that the input voltage is substantially independent of the supply voltage.

Abstract translation: 开关电路包括具有输入端，输出端，第一源极端子，偏置端子和第二源极端子的源极跟随器电流镜; 耦合到电流镜的输入的电流源; 耦合到电流镜的输出的输出端; 耦合到所述第一源极的第一偏置晶体管; 耦合到电流镜的偏置端子的第二偏置晶体管; 以及耦合到第二源极端子的驱动器晶体管。 电流镜中的输入晶体管的尺寸使得输入电压基本上与电源电压无关。

公开(公告)号：US08237483B2

公开(公告)日：2012-08-07

申请号：US12982593

申请日：2010-12-30

Applicant: Nitin Gupta ,  Nitin Jain

Inventor： Nitin Gupta ,  Nitin Jain

IPC: H03K3/00

CPC classification number: H03K5/151 ,  H03K2005/00136

Abstract: A circuit for processing a clock signal including first and second clock edges of different polarities, the circuit including an inverter for inverting a first clock edge to generate an inverted first clock edge and inverting a second clock edge to generate an inverted second clock edge; a first pass gate for receiving the inverted clock edge and outputting a first trigger signal of a first polarity; and a second pass gate for receiving the second clock edge and outputting a second trigger signal of the first polarity, wherein the second pass gate is controlled to open responsive to the inverted second clock edge; whereby the delay between the first clock edge and the first trigger signal is substantially equal to the delay between the second clock edge and second trigger signal.

Abstract translation: 一种用于处理包括不同极性的第一和第二时钟沿的时钟信号的电路，所述电路包括用于反相第一时钟沿以产生反相第一时钟沿的反相器，并且反相第二时钟沿以产生反相第二时钟沿; 第一通路门，用于接收反相时钟沿并输出第一极性的第一触发信号; 以及第二通路门，用于接收第二时钟沿并输出第一极性的第二触发信号，其中第二通道门被控制为响应于反相的第二时钟沿打开; 由此第一时钟沿和第一触发信号之间的延迟基本上等于第二时钟沿和第二触发信号之间的延迟。

公开(公告)号：US08183911B2

公开(公告)日：2012-05-22

申请号：US12581578

申请日：2009-10-19

Applicant: Somnath Kundu ,  Pikul Sarkar ,  Nitin Gupta

Inventor： Somnath Kundu ,  Pikul Sarkar ,  Nitin Gupta

IPC: G11C5/14

CPC classification number: H03K17/00 ,  H03K17/0822

Abstract: An integrated circuit includes a number of pads. The integrated circuit further includes a cascode transistor having an open drain connection to a first one of the pads. A bias generator circuit is included in the integrated circuit. The bias generator circuit has an output connected to a gate terminal of the cascode transistor. In a first mode of operation, the bias generator outputs a bias signal that is derived from an integrated circuit supply voltage present at a second one of the pads. However, in a second mode of operation provided when the integrated circuit supply voltage is not present, the bias generator generates the bias signal derived from a voltage present at the first one of the pads.

Abstract translation: 集成电路包括多个焊盘。 集成电路还包括具有到第一个焊盘的开漏连接的共源共栅晶体管。 集成电路中包含偏置发生器电路。 偏置发生器电路具有连接到共源共栅晶体管的栅极端子的输出。 在第一操作模式中，偏置发生器输出偏置信号，该偏置信号是从存在于第二焊盘处的集成电路电源电压导出的。 然而，在不存在集成电路电源电压时提供的第二操作模式中，偏置发生器产生从存在于第一焊盘处的电压导出的偏置信号。

公开(公告)号：US20120099832A1

公开(公告)日：2012-04-26

申请号：US12908714

申请日：2010-10-20

Applicant: Nitin Gupta ,  Tapas Nandy

Inventor： Nitin Gupta ,  Tapas Nandy

IPC: H04N5/775 ,  H04N5/765

CPC classification number: G11B27/105 ,  H04N5/907

Abstract: A portable video player includes: a data input coupled to a memory module to store at least one video file, a video decoder coupled to the memory module via a memory interface to decode the video file, and a video interface connector to output to a display the decoded video file.

Abstract translation: 便携式视频播放器包括：耦合到存储器模块以存储至少一个视频文件的数据输入，经由存储器接口耦合到存储器模块以解码视频文件的视频解码器，以及视频接口连接器以输出到显示器 解码的视频文件。

公开(公告)号：US20110320613A1

公开(公告)日：2011-12-29

申请号：US13172205

申请日：2011-06-29

Applicant: Jay Mandal ,  Nitin Gupta ,  Steven Chee-Man Kam

Inventor： Jay Mandal ,  Nitin Gupta ,  Steven Chee-Man Kam

IPC: G06F15/16

CPC classification number: G06Q10/107

Abstract: The invention relates to a method of establishing communication between one or more users and one or more professional service providers. The professional service provides include, but are not limited to legal professionals, medical professionals, doctors, taxation professionals, accounting professionals, and financial professionals. Information corresponding to one or more professional service requirements of the user is obtained. The information includes basic information and confidential information. The basic information is transmitted to the one or more professional service providers based on the one or more professional service requirements of the user. Thereafter, communication is established between the user and the one or more professional service providers based on conflict of interest and an affirmative confirmation from the one or more professional service providers.

Abstract translation: 本发明涉及一种建立一个或多个用户与一个或多个专业服务提供商之间的通信的方法。 专业服务包括但不限于法律专业人员，医疗专业人员，医生，税务专业人士，会计专业人员和财务人员。 获得与用户的一个或多个专业服务要求相对应的信息。 信息包括基本信息和机密信息。 基于用户的一个或多个专业服务要求将基本信息传送给一个或多个专业服务提供商。 此后，基于利益冲突和来自一个或多个专业服务提供商的肯定确认，在用户与一个或多个专业服务提供商之间建立通信。

公开(公告)号：US08010889B2

公开(公告)日：2011-08-30

申请号：US11743563

申请日：2007-05-02

Applicant: Nitin Gupta ,  Sivasankaran Chandrasekar ,  Ravi Murthy ,  Nipun Agarwal

Inventor： Nitin Gupta ,  Sivasankaran Chandrasekar ,  Ravi Murthy ,  Nipun Agarwal

IPC: G06N3/00

CPC classification number: G06F17/30569 ,  G06F17/30908 ,  H03M7/30

Abstract: Various techniques are described hereafter for improving the efficiency of binary XML encoding and loading operations. In particular, techniques are described for incrementally encoding XML in response to amount-based requests. After encoding enough binary XML to satisfy an amount-based request, the encoder stops encoding the XML until a subsequent request is received. The incremental encoding may take place on the client-side or the server-side. Techniques are also described for reducing the character set conversion operations by having a parser convert tokens in text XML into one character set while converting non-token text in the text XML into another character set. Techniques are also described for generating self-contained binary XML documents, and for improving remap operations by providing a binary XML document on a chunk-by-chunk basis.

Abstract translation: 以下描述了用于提高二进制XML编码和加载操作的效率的各种技术。 特别地，描述了用于响应于基于量的请求逐渐编码XML的技术。 在编码足够的二进制XML以满足基于数量的请求之后，编码器停止对XML的编码，直到接收到后续请求。 增量编码可能发生在客户端或服务器端。 还描述了通过使解析器将文本XML中的令牌转换为一个字符集同时将文本XML中的非令牌文本转换为另一个字符集来减少字符集转换操作的技术。 还描述了用于生成自包含二进制XML文档以及通过以块为单位提供二进制XML文档来改进重映射操作的技术。

公开(公告)号：US20110085450A1

公开(公告)日：2011-04-14

申请号：US12900357

申请日：2010-10-07

Applicant: Vinod JEYACHANDRAN ,  Pradeep Natarajan ,  James Mark Shaw ,  Raghavendra Uppalli ,  Pradeep Singh ,  Nitin Gupta ,  Jerrold Stiffler

Inventor： Vinod JEYACHANDRAN ,  Pradeep Natarajan ,  James Mark Shaw ,  Raghavendra Uppalli ,  Pradeep Singh ,  Nitin Gupta ,  Jerrold Stiffler

IPC: H04L12/26

CPC classification number: H04L41/12 ,  H04L41/0213

Abstract: A network analysis system invokes an application specific, or source-destination specific, path discovery process. The application specific path discovery process determines the path(s) used by the application, collects performance data from the nodes along the path, and communicates this performance data to the network analysis system for subsequent performance analysis. The system may also maintain a database of prior network configurations to facilitate the identification of nodes that are off the path that may affect the current performance of the application. The system may also be specifically controlled so as to identify the path between any pair of specified nodes, and to optionally collect performance data associated with the path.

Abstract translation: 网络分析系统调用特定于应用程序或源特定路径的路径发现过程。 应用程序特定路径发现过程确定应用程序使用的路径，从沿着路径的节点收集性能数据，并将该性能数据传达到网络分析系统以进行后续性能分析。 系统还可以维护先前网络配置的数据库，以便于识别可能影响应用的当前性能的路径之外的节点。 还可以特别地控制系统，以便识别任何一对指定节点之间的路径，并且可选地收集与该路径相关联的性能数据。

公开(公告)号：US20100241807A1

公开(公告)日：2010-09-23

申请号：US12730192

申请日：2010-03-23

Applicant: David Tze-Si Wu ,  Steven McCanne ,  Michael J. Demmer ,  Nitin Gupta

Inventor： David Tze-Si Wu ,  Steven McCanne ,  Michael J. Demmer ,  Nitin Gupta

IPC: G06F12/08 ,  G06F12/00

CPC classification number: G06F16/188 ,  G06F3/0643 ,  G06F3/0653 ,  G06F3/067 ,  G06F12/0862 ,  G06F16/172 ,  G06F2212/6024

Abstract: Virtual storage arrays consolidate branch data storage at data centers connected via wide area networks. Virtual storage arrays appear to storage clients as local data storage; however, virtual storage arrays actually store data at the data center. The virtual storage arrays overcomes bandwidth and latency limitations of the wide area network by predicting and prefetching storage blocks, which are then cached at the branch location. Virtual storage arrays leverage an understanding of the semantics and structure of high-level data structures associated with storage blocks to predict which storage blocks are likely to be requested by a storage client in the near future. Virtual storage arrays determine the association between requested storage blocks and corresponding high-level data structure entities to predict additional high-level data structure entities that are likely to be accessed. From this, the virtual storage array identifies the additional storage blocks for prefetching.

Abstract translation: 虚拟存储阵列将通过广域网连接的数据中心的分支数据存储整合。 虚拟存储阵列对存储客户端显示为本地数据存储; 然而，虚拟存储阵列实际上将数据存储在数据中心。 虚拟存储阵列通过预测和预取存储块来克服广域网的带宽和延迟限制，然后将存储块缓存在分支位置。 虚拟存储阵列利用对与存储块相关联的高级数据结构的语义和结构的理解，以预测存储客户端在不久的将来可能要求哪些存储块。 虚拟存储阵列确定所请求的存储块和相应的高级数据结构实体之间的关联，以预测可能被访问的附加高级数据结构实体。 从此，虚拟存储阵列识别用于预取的附加存储块。

公开(公告)号：US20100010212A1

公开(公告)日：2010-01-14

申请号：US12583305

申请日：2009-08-17

Applicant: Vinod Kumar Kansal ,  Suhail Ahmad ,  Bhupendra Tyagi ,  Nitin Gupta

Inventor： Vinod Kumar Kansal ,  Suhail Ahmad ,  Bhupendra Tyagi ,  Nitin Gupta

IPC: C07D205/08 ,  A61K31/397

CPC classification number: C07D205/08 ,  Y02P20/55

Abstract: The invention encompasses (3R,4S)-4-((4-benzyloxy)phenyl)-1-(4-fluorophenyl)-3-(3-(4-fluorophenyl)-3-oxopropyl)-2-azetidinone (Compound 2a) having an enantiomeric purity of at least about 97.5%. The invention also encompasses Compound 2a having a chemical purity of at least about 97%. The invention further encompasses processes for preparing Compound 2a from Compound 1 having the following formula: The invention also encompasses processes for preparing a compound having the following formula: from a compound having the following formula: wherein R is selected from the group consisting of: H or a hydroxyl protecting group. The invention also encompasses processes for preparing Compound 2a, preferably to form Compound 2a-Form 01. Also included are processes for preparing ezetimibe from Compound 2a-Form 01 or Compound 2a prepared according to the invention, compositions containing such ezetimibe, and methods for reducing cholesterol using such compositions

Abstract translation: 本发明包括（3R，4S）-4 - （（4-苄氧基）苯基）-1-（4-氟苯基）-3-（3-（4-氟苯基）-3-氧代丙基）-2-氮杂环丁酮（化合物2a ）具有至少约97.5％的对映体纯度。 本发明还包括具有至少约97％的化学纯度的化合物2a。 本发明还包括从具有下式的化合物1制备化合物2a的方法：本发明还包括由具有下式的化合物制备具有下式的化合物的方法：其中R选自：H 或羟基保护基。 本发明还包括制备化合物2a，优选形成化合物2a-形式01的方法。还包括用于制备根据本发明制备的化合物2a-形式01或化合物2a的依泽替米贝的方法，含有这种依泽替米贝的组合物，以及还原方法 使用这种组合物的胆固醇

公开(公告)号：US20090132556A1

公开(公告)日：2009-05-21

申请号：US11941746

申请日：2007-11-16

Applicant: Nitin Gupta ,  Jayavel Shanmugasundaram ,  Fan Yang

Inventor： Nitin Gupta ,  Jayavel Shanmugasundaram ,  Fan Yang

IPC: G06F7/00 ,  G06F17/00

CPC classification number: G06F8/65 ,  G06F8/35

Abstract: Subject matter disclosed herein may relate to enabling offline operations for online applications.

Abstract translation: 本文中公开的主题可能涉及启用在线应用程序的脱机操作。