公开(公告)号：US20120099832A1

公开(公告)日：2012-04-26

申请号：US12908714

申请日：2010-10-20

Applicant: Nitin Gupta ,  Tapas Nandy

Inventor： Nitin Gupta ,  Tapas Nandy

IPC: H04N5/775 ,  H04N5/765

CPC classification number: G11B27/105 ,  H04N5/907

Abstract: A portable video player includes: a data input coupled to a memory module to store at least one video file, a video decoder coupled to the memory module via a memory interface to decode the video file, and a video interface connector to output to a display the decoded video file.

Abstract translation: 便携式视频播放器包括：耦合到存储器模块以存储至少一个视频文件的数据输入，经由存储器接口耦合到存储器模块以解码视频文件的视频解码器，以及视频接口连接器以输出到显示器 解码的视频文件。

公开(公告)号：US08314633B2

公开(公告)日：2012-11-20

申请号：US12650092

申请日：2009-12-30

Applicant: Nitin Gupta ,  Tapas Nandy ,  Phalguni Bala ,  Pikul Sarkar

Inventor： Nitin Gupta ,  Tapas Nandy ,  Phalguni Bala ,  Pikul Sarkar

IPC: H03K19/003 ,  H03K19/0175

CPC classification number: H03K19/00361 ,  H03K19/018514

Abstract: Described herein are various principles for operating a transmitter circuit to reduce noise affecting a signal being generated and reducing jitter. In some embodiments, a circuit is operated in a way that switching occurs at or above a bit rate of transmission, such that at least one switch changes state at least for every bit. Operating the circuit in such a way leads to a switching rate that is above a resonant frequency of the circuit and prevents large oscillations and noise from being inserted into the signal and causing communication problems.

Abstract translation: 这里描述了用于操作发射机电路以减少影响正在产生的信号的噪声并减少抖动的各种原理。 在一些实施例中，以使得至少一个开关至少对于每一位进行改变状态的切换发生在等于或高于传输比特率的方式来操作电路。 以这种方式操作电路导致高于电路的谐振频率的开关速率，并且防止大的振荡和噪声被插入到信号中并导致通信问题。

公开(公告)号：US20120169403A1

公开(公告)日：2012-07-05

申请号：US12982583

申请日：2010-12-30

Applicant: Nitin Gupta ,  Tapas Nandy

Inventor： Nitin Gupta ,  Tapas Nandy

IPC: G11C5/14

CPC classification number: H04L25/0272 ,  G09G2330/023 ,  G09G2370/12 ,  H04N21/43635

Abstract: A transmitter having at least one channel comprising a first differential circuit driven by a differential data signal, the first differential circuit configured to output the differential data at a first and second output and a first control circuit coupled between the first differential circuit and the first and second output, the first control circuit driven by a drive voltage.

Abstract translation: 一种具有至少一个信道的发射机，包括由差分数据信号驱动的第一差分电路，所述第一差分电路被配置为在第一和第二输出端输出差分数据，以及耦合在第一差分电路与第一和第二差分电路之间的第一控制电路， 第二输出，由驱动电压驱动的第一控制电路。

公开(公告)号：US09148099B2

公开(公告)日：2015-09-29

申请号：US12980878

申请日：2010-12-29

Applicant: Tapas Nandy ,  Nitin Gupta

Inventor： Tapas Nandy ,  Nitin Gupta

IPC: H03K17/16 ,  H03K19/003 ,  H03F3/45

CPC classification number: H03F3/45928 ,  H03F3/45475 ,  H03F2200/294 ,  H03F2200/411 ,  H03F2203/45544 ,  H03F2203/45594 ,  H03F2203/45596 ,  H03F2203/45631 ,  H03F2203/45702

Abstract: An embodiment of a transmitter includes an amplifier having first and second differential output nodes, a first supply node, a first pull-up impedance having a first node coupled to the first differential output node and having a second node coupled to the supply node, and a second pull-up impedance having a first node coupled to the second differential output node and having a second node coupled to the supply node. An embodiment of a receiver includes an amplifier having first and second differential input nodes, a first supply node, a first pull-up impedance having a first node coupled to the first differential input node and having a second node coupled to the supply node, and a second pull-up impedance having a first node coupled to the second differential input node and having a second node coupled to the supply node. In an embodiment, the transmitter and receiver are capacitively coupled to one another.

Abstract translation: 发射机的实施例包括具有第一和第二差分输出节点的放大器，第一供电节点，第一上拉阻抗，其具有耦合到第一差分输出节点的第一节点并且具有耦合到供电节点的第二节点，以及 第二上拉阻抗，其具有耦合到所述第二差分输出节点并且具有耦合到所述电源节点的第二节点的第一节点。 接收机的实施例包括具有第一和第二差分输入节点的放大器，第一供电节点，第一上拉阻抗，其具有耦合到第一差分输入节点的第一节点并且具有耦合到供应节点的第二节点，以及 第二上拉阻抗，其具有耦合到所述第二差分输入节点并具有耦合到所述电源节点的第二节点的第一节点。 在一个实施例中，发射机和接收机彼此电容耦合。

公开(公告)号：US08786321B2

公开(公告)日：2014-07-22

申请号：US12982583

申请日：2010-12-30

Applicant: Nitin Gupta ,  Tapas Nandy

Inventor： Nitin Gupta ,  Tapas Nandy

IPC: H03B1/00 ,  H03K3/00

CPC classification number: H04L25/0272 ,  G09G2330/023 ,  G09G2370/12 ,  H04N21/43635

Abstract: A transmitter having at least one channel comprising a first differential circuit driven by a differential data signal, the first differential circuit configured to output the differential data at a first and second output and a first control circuit coupled between the first differential circuit and the first and second output, the first control circuit driven by a drive voltage.

Abstract translation: 一种具有至少一个信道的发射机，包括由差分数据信号驱动的第一差分电路，所述第一差分电路被配置为在第一和第二输出端输出差分数据，以及耦合在第一差分电路与第一和第二差分电路之间的第一控制电路， 第二输出，由驱动电压驱动的第一控制电路。

公开(公告)号：US20110062983A1

公开(公告)日：2011-03-17

申请号：US12650092

申请日：2009-12-30

Applicant: Nitin Gupta ,  Tapas Nandy ,  Phalguni Bala ,  Pikul Sarkar

Inventor： Nitin Gupta ,  Tapas Nandy ,  Phalguni Bala ,  Pikul Sarkar

IPC: H03K19/003 ,  H03K19/0175

CPC classification number: H03K19/00361 ,  H03K19/018514

Abstract: Described herein are various principles for operating a transmitter circuit to reduce noise affecting a signal being generated and reducing jitter. In some embodiments, a circuit is operated in a way that switching occurs at or above a bit rate of transmission, such that at least one switch changes state at least for every bit. Operating the circuit in such a way leads to a switching rate that is above a resonant frequency of the circuit and prevents large oscillations and noise from being inserted into the signal and causing communication problems.

Abstract translation: 这里描述了用于操作发射机电路以减少影响正在产生的信号的噪声并减少抖动的各种原理。 在一些实施例中，以使得至少一个开关至少对于每一位进行改变状态的切换发生在等于或高于传输比特率的方式来操作电路。 以这种方式操作电路导致高于电路的谐振频率的开关速率，并且防止大的振荡和噪声被插入到信号中并导致通信问题。

公开(公告)号：US10831721B2

公开(公告)日：2020-11-10

申请号：US12730185

申请日：2010-03-23

Applicant: David Tze-Si Wu ,  Steven McCanne ,  Michael J. Demmer ,  Nitin Gupta

Inventor： David Tze-Si Wu ,  Steven McCanne ,  Michael J. Demmer ,  Nitin Gupta

IPC: G06F16/188 ,  G06F16/172 ,  G06F12/0862 ,  G06F3/06

Abstract: Virtual storage arrays consolidate branch data storage at data centers connected via wide area networks. Virtual storage arrays appear to storage clients as local data storage; however, virtual storage arrays actually store data at the data center. The virtual storage arrays overcomes bandwidth and latency limitations of the wide area network by predicting and prefetching storage blocks, which are then cached at the branch location. Virtual storage arrays leverage an understanding of the semantics and structure of high-level data structures associated with storage blocks to predict which storage blocks are likely to be requested by a storage client in the near future. Virtual storage arrays determine the association between requested storage blocks and corresponding high-level data structure entities to predict additional high-level data structure entities that are likely to be accessed. From this, the virtual storage array identifies the additional storage blocks for prefetching.

公开(公告)号：US09830379B2

公开(公告)日：2017-11-28

申请号：US12955253

申请日：2010-11-29

Applicant: Nitin Gupta ,  Abhinandan S. Das

Inventor： Nitin Gupta ,  Abhinandan S. Das

IPC: G06F17/30

CPC classification number: G06F17/3064

Abstract: Methods, systems and apparatus, including computer programs encoded on a computer storage medium, for disambiguating names in a document corpus. In an aspect, a method includes generating context term lists for a person name, each context term list being a list of context terms from a resource for the person name; clustering the context term lists into a plurality of clusters, each of the clusters of context term lists including context term lists that are most similar to the cluster relative to other clusters; for each of the clusters, selecting a representative term for the cluster; receiving the person name as a search query; and generating a plurality of query suggestions from the search query and the representative terms for the clusters, each query suggesting being a combination of the person name and one representative term.

公开(公告)号：US09092479B1

公开(公告)日：2015-07-28

申请号：US13620500

申请日：2012-09-14

Applicant: Steven D. Baker ,  Michael Flaster ,  Nitin Gupta ,  Paul G. Haahr ,  Srinivasan Venkatachary ,  Yonghui Wu

Inventor： Steven D. Baker ,  Michael Flaster ,  Nitin Gupta ,  Paul G. Haahr ,  Srinivasan Venkatachary ,  Yonghui Wu

IPC: G06F17/30

CPC classification number: G06F17/30563 ,  G06F17/248 ,  G06F17/30389 ,  G06F17/3064 ,  G06F17/30864

Abstract: Methods, systems, and apparatus, including computer program products, for generating synthetic queries using seed queries and structural similarity between documents are described. In one aspect, a method includes identifying embedded coding fragments (e.g., HTML tag) from a structured document and a seed query; generating one or more query templates, each query template corresponding to at least one coding fragment, the query template including a generative rule to be used in generating candidate synthetic queries; generating the candidate synthetic queries by applying the query templates to other documents that are hosted on the same web site as the document; identifying terms that match structure of the query templates as candidate synthetic queries; measuring a performance for each of the candidate synthetic queries; and designating as synthetic queries the candidate synthetic queries that have performance measurements exceeding a performance threshold.

Abstract translation: 描述了使用种子查询和文档之间的结构相似性来生成合成查询的方法，系统和装置，包括计算机程序产品。 一方面，一种方法包括从结构化文档和种子查询中识别嵌入的编码片段（例如HTML标签）; 生成一个或多个查询模板，每个查询模板对应于至少一个编码片段，所述查询模板包括要用于生成候选综合查询的生成规则; 通过将查询模板应用于与文档在同一网站上托管的其他文档来生成候选综合查询; 将与查询模板的结构匹配的条款识别为候选综合查询; 测量每个候选综合查询的性能; 并且将具有超过性能阈值的性能测量的候选综合查询指定为合成查询。

公开(公告)号：US08812826B2

公开(公告)日：2014-08-19

申请号：US12908370

申请日：2010-10-20

Applicant: Abhishek Bansal ,  Nitin Gupta ,  Brad L. Herold ,  Jayakumar N Sankarannair

Inventor： Abhishek Bansal ,  Nitin Gupta ,  Brad L. Herold ,  Jayakumar N Sankarannair

IPC: G06F9/32

CPC classification number: G06F9/30058 ,  G06F9/3005 ,  G06F9/3804 ,  G06F11/2236 ,  G06F11/28

Abstract: In one implementation, processor testing may include the ability to randomly generate a first plurality of branch instructions for a first portion of an instruction set, each branch instruction in the first portion branching to a respective instruction in a second portion of the instruction set, the branching of the branch instructions to the respective instructions being arranged in a sequential manner. Processor testing may also include the ability to randomly generate a second plurality of branch instructions for the second portion of the instruction set, each branch instruction in the second portion branching to a respective instruction in the first portion of the instruction set, the branching of the branch instructions to the respective instructions being arranged in a sequential manner. Processor testing may additionally include the ability to generate a plurality of instructions to increment a counter when each branch instruction is encountered during execution.

Abstract translation: 在一个实现中，处理器测试可以包括随机生成指令集的第一部分的第一多个分支指令的能力，第一部分中的每个分支指令分支到指令集的第二部分中的相应指令， 分支指令的分支到相应的指令以顺序的方式排列。 处理器测试还可以包括随机生成指令集的第二部分的第二多个分支指令的能力，第二部分中的每个分支指令分支到指令集的第一部分中的相应指令， 相应指令的分支指令按顺序排列。 处理器测试可以另外包括在执行期间遇到每个分支指令时产生多个指令来增加计数器的能力。