公开(公告)号：US20230259474A1

公开(公告)日：2023-08-17

申请号：US17898297

申请日：2022-08-29

Applicant: STMicroelectronics (Grand Ouest) SAS

Inventor： Pierre LE CORRE

IPC: G06F13/38 ,  G06F13/40 ,  G06F9/445

CPC classification number: G06F13/385 ,  G06F13/4063 ,  G06F9/44505

Abstract: System, method, and circuitry for generating content for a programmable computing device based on user-selected configuration information. A settings registry is generated based on the user's selections. The settings registry and the user selected configuration information is utilized to generate the content, such as code, data, parameters, settings, etc. When the content is provided to the programmable computing device, the content initializes, configures, or controls one or more software and hardware aspects of the programmable computing device, such as boot sequence configurations, internal peripheral configurations, states of the programmable computing device, transitions between states of the programmable computing device, etc., and various combinations thereof.

公开(公告)号：US11614949B2

公开(公告)日：2023-03-28

申请号：US16899327

申请日：2020-06-11

Applicant: STMicroelectronics (Grand Ouest) SAS ,  STMicroelectronics (Grenoble 2) SAS

Inventor： Loic Pallardy ,  Ignazio Antonino Urzi ,  Jean-Francis Duret

IPC: G06F13/40 ,  G06F9/4401 ,  G06F9/30 ,  G06F9/345 ,  G06F9/445

Abstract: An integrated circuit comprises a processing unit configured for booting up with a set of boot instructions, then for determining the size of the instructions of an application programme and potentially rebooting on its own initiative, while being reconfigured, in order for it to execute the instructions of the application program. Only one boot memory is needed as a consequence.

公开(公告)号：US20230015027A1

公开(公告)日：2023-01-19

申请号：US17812883

申请日：2022-07-15

Applicant: STMicroelectronics (Grand Ouest) SAS

Inventor： Michel Jaouen ,  Loic Pallardy

IPC: G06F21/62 ,  G06F12/0802

Abstract: In an embodiment a method for managing access rights of software tasks executed by a processing unit (CPU) using a cache memory containing execution data of the tasks in memory locations, each execution data having an attribute representative of a level of access right of the respective task, includes changing the attributes of the locations of the cache memory when the access rights of at least one task changes and retaining the execution data contained in the locations of the cache memory.

公开(公告)号：US20220179659A1

公开(公告)日：2022-06-09

申请号：US17540041

申请日：2021-12-01

Applicant: STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Grand Ouest) SAS

Inventor： Loic Pallardy ,  Michael Soulie

IPC: G06F9/4401 ,  G06F13/40

Abstract: The method for resetting a master device, configured to initiate transactions on a bus of a system on a chip, includes monitoring a completed or not state of the transactions initiated by the master device. In the case of reception of a command to reset the master device, the method includes a transmission of an effective reset command to the master device when the transactions initiated by the master device are in the completed state.

公开(公告)号：US11340798B2

公开(公告)日：2022-05-24

申请号：US16898921

申请日：2020-06-11

Applicant: STMicroelectronics (Rousset) SAS ,  STMicroelectronics (Grand Ouest) SAS

Inventor： William Orlando ,  Julien Couvrand ,  Pierre Guillemin

IPC: G06F3/06 ,  H04L9/06

Abstract: A method includes receiving, by a first microprocessor, a request of modification of a content of a first memory of the first microprocessor, the first memory being accessible only by the first microprocessor. The method includes accessing, by the first microprocessor, first data associated with the request and a signature generated from the first data with an asymmetric cipher algorithm. The first data and the signature are available in a second memory of a second microprocessor, and the first data is representative of a modification to be applied to the content of the first memory. The modification is representative of a modification of a set of services exposed by the first microprocessor. The method includes verifying, by the first microprocessor, authenticity of the first data based on the signature; and modifying the content of the first memory according to the first data, the modifying being conditioned by the verifying.

公开(公告)号：US20220080979A1

公开(公告)日：2022-03-17

申请号：US17470962

申请日：2021-09-09

Applicant: STMICROELECTRONICS S.r.l. ,  STMICROELECTRONICS, INC. ,  STMicroelectronics (Grand Ouest) SAS

Inventor： Nicola Matteo PALELLA ,  Leonardo COLOMBO ,  Andrea DONADEL ,  Roberto MURA ,  Mahaveer JAIN ,  Joëlle PHILIPPE

IPC: B60W40/101 ,  B60W40/11 ,  B60W40/112 ,  B60W40/114 ,  G01S19/47

Abstract: A system includes inertial sensors and a GPS. The system generates a first estimated vehicle velocity based on motion data and positioning data, generates a second estimated vehicle velocity based on the processed motion data and the first estimated vehicle velocity, and generates fused datasets indicative of position, velocity and attitude of a vehicle based on the processed motion data, the positioning data and the second estimated vehicle velocity. The generating the second estimated vehicle velocity includes: filtering the motion data, transforming the filtered motion data in a frequency domain based on the first estimated vehicle velocity, generating spectral power density signals, generating an estimated wheel angular frequency and an estimated wheel size based on the spectral power density signals, and generating the second estimated vehicle velocity as a function of the estimated wheel angular frequency and the estimated wheel size.

公开(公告)号：US11269986B2

公开(公告)日：2022-03-08

申请号：US16660243

申请日：2019-10-22

Applicant: STMicroelectronics (Grand Ouest) SAS ,  STMicroelectronics (Rousset) SAS

Inventor： Vincent Berthelot ,  Layachi Daineche

IPC: G06F21/00 ,  G06F21/44

Abstract: A memory stores a program to be executed by a microprocessor. The program includes a first program part and a second program part. An authenticator is configured to authenticate the program and includes a module that is external to the microprocessor and configured to authenticate said first program part when the microprocessor is inactive. The authenticator further activates the microprocessor to execute the first program part and authenticate said second program part using instructions of the first program part if the module has authenticated the first program part. The microprocessor then executes the second program part if the microprocessor has authenticated said second program part.

公开(公告)号：US20220066774A1

公开(公告)日：2022-03-03

申请号：US17404835

申请日：2021-08-17

Applicant: StMicroelectronics (Grand Ouest) SAS

Inventor： Lionel Cimaz

IPC: G06F9/22 ,  G06F9/30 ,  G06F9/26

Abstract: An embodiment method executes instructions, each corresponding to switching a signal, a delay, and a condition selected among first, second, or third conditions. Each execution includes performing, after the delay, switching the signal if the condition is the first condition, if the condition is the second condition and a flag is in an active state, or if the condition is the third condition and the flag is in an inactive state, or not switching the signal if the condition is the second condition and the flag is in the inactive state, or if the condition is the third condition and the flag is in the active state. A first instruction represents a first switching of a first signal, a first delay, and the second condition, and is immediately followed by a second instruction representing the first switching of the first signal, a second delay, and the third condition.

公开(公告)号：US11062866B2

公开(公告)日：2021-07-13

申请号：US16021449

申请日：2018-06-28

Applicant: STMicroelectronics (Grand Ouest) SAS

Inventor： Vincent Abriou ,  Gerald Baeza

IPC: H01H47/00 ,  H01H3/42 ,  H01H50/54 ,  H01H53/00 ,  H02N2/00 ,  H02P8/12 ,  H02P7/06 ,  H01H57/00

Abstract: The electrical relay device comprising a component of electrical relay type including a controllable motor, and a switching module including at least one fixed electrical contact, and at least one movable electrical contact that is mechanically coupled to the motor and configured to be placed, using the motor, in at least one position, referred to as the disconnected position, in which it does not make contact with a fixed electrical contact, or in at least one position, referred to as the connected position, in which it does make contact with the at least one fixed electrical contact.

公开(公告)号：US20210160134A1

公开(公告)日：2021-05-27

申请号：US16951198

申请日：2020-11-18

Applicant: STMicroelectronics (Alps) SAS ,  STMicroelectronics (Grand Ouest) SAS

Inventor： Nicolas Anquet ,  Loic Pallardy

IPC: H04L12/24 ,  H04L12/933

Abstract: System on a chip, comprising several master pieces of equipment, several slave resources, an interconnection circuit capable of routing transactions between master pieces of equipment and slave resources, and a processing unit at least configured to allow a user of the system on a chip to implement within the system on a chip at least one configuration diagram of this system defined by a set of configuration pieces of information including at least one piece of identification information assigned to each master piece of equipment, The identification pieces of information are intended to be attached to all the transactions emitted by the corresponding master pieces of equipment, the set of configuration pieces of information not being used for addressing the slave resources receiving the transactions and being used to define an assignment of at least one piece of master equipment to at least some of the slave resources.