公开(公告)号：US08178879B2

公开(公告)日：2012-05-15

申请号：US12795430

申请日：2010-06-07

申请人： Hee-Dong Choi ,  Seong-Moh Seo

发明人： Hee-Dong Choi ,  Seong-Moh Seo

IPC分类号： H01L29/04

CPC分类号： H01L27/1288 ,  H01L27/1214 ,  H01L27/1274

摘要： An array substrate for a display device includes a gate electrode on a substrate; a gate insulating layer on the gate electrode and having the same plane area and the same plane shape as the gate electrode; an active layer on the gate insulating layer and exposing an edge of the gate insulating layer; an interlayer insulating layer on the active layer and including first and second active contact holes, the first and second active contact holes respectively exposing both sides of the active layers; first and second ohmic contact layers contacting the active layer through the first and second active contact holes, respectively; a source electrode on the first ohmic contact layer; a drain electrode on the second ohmic contact layer; a data line on the interlayer insulating layer and connected to the source electrode; a first passivation layer on the source electrode, the drain electrode and the data line, the first passivation layer, the interlayer insulating layer and the gate insulating layer have a first gate contact hole exposing a portion of the gate electrode; a gate line on the first passivation layer and contacting the gate electrode through the first gate contact hole, the gate line crossing the data line; a second passivation layer on the gate line and having a drain contact hole exposing the drain electrode; and a pixel electrode on the second passivation layer and contacting the drain electrode through the contact hole.

摘要翻译： 用于显示装置的阵列基板包括在基板上的栅电极; 栅电极上的栅极绝缘层，并且具有与栅电极相同的平面面积和相同的平面形状; 栅极绝缘层上的有源层，并露出栅极绝缘层的边缘; 所述有源层上的层间绝缘层包括第一和第二有源接触孔，所述第一和第二有源接触孔分别暴露有源层的两侧; 第一和第二欧姆接触层分别通过第一和第二有源接触孔与有源层接触; 在第一欧姆接触层上的源电极; 第二欧姆接触层上的漏电极; 在层间绝缘层上的与源电极连接的数据线; 源电极，漏电极和数据线上的第一钝化层，第一钝化层，层间绝缘层和栅极绝缘层具有暴露栅电极的一部分的第一栅极接触孔; 在第一钝化层上的栅极线，并通过第一栅极接触孔与栅电极接触，栅极线与数据线交叉; 栅极线上的第二钝化层，并具有暴露漏电极的漏极接触孔; 以及在所述第二钝化层上的像素电极，并且通过所述接触孔与所述漏电极接触。

公开(公告)号：US08153468B2

公开(公告)日：2012-04-10

申请号：US12625904

申请日：2009-11-25

申请人： Seong Moh Seo

发明人： Seong Moh Seo

IPC分类号： H01L21/00

CPC分类号： H01L27/3248 ,  H01L2251/5315

摘要： A light emitting device and a method of manufacturing the same are provided. The light emitting device comprises a substrate, a gate electrode positioned on the substrate, a first insulating layer positioned on the substrate comprising the gate electrode, an amorphous silicon layer positioned on the first insulating layer so that a predetermined area thereof corresponds to the gate electrode, ohmic layers that positioned on a predetermined area of the amorphous silicon layer, the ohmic layers defining a source area and a drain area, a source electrode or a drain electrode electrically connected to any one of the ohmic layers and a cathode that is electrically connected to the other one of the ohmic layers, a second insulating layer positioned on the substrate comprising the source electrode or the drain electrode and the cathode, the second insulating layer comprising an opening exposing a portion of the cathode, an emitting layer positioned within the opening, and an anode positioned on the substrate comprising the emitting layer.

摘要翻译： 提供一种发光器件及其制造方法。 发光器件包括衬底，位于衬底上的栅电极，位于包括栅电极的衬底上的第一绝缘层，位于第一绝缘层上的非晶硅层，使得其预定面积对应于栅电极 位于非晶硅层的预定区域上的欧姆层，限定源极区域和漏极区域的欧姆层，电连接到欧姆层中的任一个的源极或漏电极以及电连接的阴极 位于所述基板上的第二绝缘层，所述第二绝缘层包括所述源电极或所述漏电极和所述阴极，所述第二绝缘层包括暴露所述阴极的一部分的开口，位于所述开口内的发光层 以及位于包括发光层的基板上的阳极。

公开(公告)号：US20100123138A1

公开(公告)日：2010-05-20

申请号：US12497101

申请日：2009-07-02

申请人： Hee-Dong Choi ,  Seong-Moh Seo

发明人： Hee-Dong Choi ,  Seong-Moh Seo

IPC分类号： H01L29/786 ,  H01L21/336 ,  H01L33/00

CPC分类号： H01L27/124 ,  H01L27/1288 ,  H01L29/4908 ,  H01L29/66765

摘要： A method of manufacturing a display device includes forming a gate electrode on a substrate, a gate insulating layer on the gate electrode, and an active layer on the gate insulating layer, the gate electrode made of extrinsic polycrystalline silicon, the active layer made of intrinsic polycrystalline silicon; forming an etch stopper on the active layer; forming source and drain electrodes spaced apart from each other on the etch stopper; forming an ohmic contact layer each between a side of the active layer and the source electrode and between an opposing side of the active layer and the drain electrode; forming a gate line connected to the gate electrode; and forming a data line crossing the gate line.

摘要翻译： 一种制造显示装置的方法包括：在基板上形成栅电极，在栅电极上形成栅极绝缘层，在栅极绝缘层上形成有源层，由外部多晶硅制成的栅电极，由内在的 多晶硅; 在所述有源层上形成蚀刻停止层; 在蚀刻停止器上形成彼此间隔开的源极和漏极; 在所述有源层的一侧和所述源极之间以及所述有源层和所述漏电极的相对侧之间形成欧姆接触层; 形成连接到栅电极的栅极线; 并形成跨越栅极线的数据线。

公开(公告)号：US20100117090A1

公开(公告)日：2010-05-13

申请号：US12486453

申请日：2009-06-17

申请人： Hyung-Gu Roh ,  Byung-Chul Ahn ,  Hee-Dong Choi ,  Seong-Moh Seo ,  Jun-Min Lee

发明人： Hyung-Gu Roh ,  Byung-Chul Ahn ,  Hee-Dong Choi ,  Seong-Moh Seo ,  Jun-Min Lee

IPC分类号： H01L33/00 ,  H01L21/336 ,  H01L21/268

CPC分类号： H01L27/1285 ,  H01L21/268 ,  H01L27/1288

摘要： A method of fabricating an array substrate includes: forming a gate line and a gate electrode connected to the gate line; forming a gate insulating layer on the gate line and the gate insulting layer; sequentially forming an intrinsic amorphous silicon pattern and an impurity-doped amorphous silicon pattern on the gate insulating layer over the gate electrode; forming a data line on the gate insulating layer and source and drain electrodes on the impurity-doped amorphous silicon pattern, the data line crossing the gate line to define a pixel region, and the source and drain electrodes spaced apart from each other; removing a portion of the impurity-doped amorphous silicon pattern exposed through the source and drain electrodes to define an ohmic contact layer; irradiating a first laser beam onto the intrinsic amorphous silicon pattern through the source and drain electrode to form an active layer including a first portion of polycrystalline silicon and a second portion of amorphous silicon at both sides of the first portion; forming a passivation layer on the data line, the source electrode and the drain electrode, the passivation layer having a drain contact hole exposing the drain electrode; and forming a pixel electrode on the passivation layer in the pixel region, the pixel electrode connected to the drain electrode through the drain contact hole.

摘要翻译： 制造阵列基板的方法包括：形成栅极线和连接到栅极线的栅电极; 在栅极线和栅极绝缘层上形成栅极绝缘层; 在栅电极上的栅极绝缘层上依次形成本征非晶硅图案和杂质掺杂非晶硅图案; 在栅极绝缘层上形成数据线，在掺杂杂质的非晶硅图案上的源电极和漏极之间形成数据线，该数据线与栅极线交叉以限定一个像素区域，以及源极和漏极彼此间隔开; 去除通过源极和漏极暴露的杂质掺杂非晶硅图案的一部分，以限定欧姆接触层; 通过源极和漏极将第一激光束照射到本征非晶硅图案上，以在第一部分的两侧形成包括多晶硅的第一部分和非晶硅的第二部分的有源层; 在数据线上形成钝化层，源电极和漏电极，钝化层具有暴露漏电极的漏极接触孔; 以及在所述像素区域中的钝化层上形成像素电极，所述像素电极通过所述漏极接触孔与所述漏电极连接。

公开(公告)号：US20050189578A1

公开(公告)日：2005-09-01

申请号：US11063730

申请日：2005-02-24

申请人： Seong-Moh Seo ,  Jae-Bon Koo

发明人： Seong-Moh Seo ,  Jae-Bon Koo

IPC分类号： H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L27/13 ,  H01L27/32 ,  H01L31/119

CPC分类号： H01L29/66757 ,  H01L27/1255 ,  H01L27/1288 ,  H01L27/3244

摘要： A flat panel display device having a high capacitance and a high aperture ratio. A thin film transistor and a capacitor are formed on an insulating substrate. The thin film transistor includes a semiconductor layer, a gate electrode and source and drain electrodes. The capacitor has first and second capacitor electrodes and a dielectric layer. An insulating layer is formed over the transistor to insulate the gate electrode from the source and drain electrodes, and a portion of the insulating layer is formed as the dielectric layer between the first and second capacitor electrodes. A non-planar shape of the first capacitor electrode and a conforming shape of the dielectric layer and a second capacitor electrode increase a capacitance of the capacitor. The portion of the insulating layer serving as the capacitor dielectric is formed to be thinner than the portion of the insulating layer formed over the gate electrode.

公开(公告)号：US06809787B1

公开(公告)日：2004-10-26

申请号：US09256180

申请日：1999-02-24

申请人： Seong Moh Seo ,  Hyun Ho Shin ,  Kyeong Jin Kim ,  Yun Bok Lee ,  Jeom Jae Kim

发明人： Seong Moh Seo ,  Hyun Ho Shin ,  Kyeong Jin Kim ,  Yun Bok Lee ,  Jeom Jae Kim

IPC分类号： G02F11337

CPC分类号： G02F1/133707 ,  G02F1/133512 ,  G02F1/136213 ,  G02F1/136286 ,  G02F2001/133519 ,  G02F2001/133562 ,  G02F2001/136218

摘要： A multi-domain liquid crystal display device includes first and second substrates facing each other and a liquid crystal layer between the first and second substrates. A plurality of gate bus lines are arranged in a first direction on the first substrate and a plurality of data bus lines are arranged in a second direction on the first substrate to define a pixel region. A pixel electrode is electrically charged through the data bus line in the pixel region. A common-auxiliary electrode surrounds the pixel electrode on a same layer whereon the gate bus line is formed.

摘要翻译： 多域液晶显示装置包括彼此面对的第一和第二基板以及第一和第二基板之间的液晶层。 在第一基板上沿第一方向布置多条栅极总线，并且在第一基板上沿第二方向布置多条数据总线以限定像素区域。 像素电极通过像素区域中的数据总线进行充电。 共同辅助电极围绕形成栅极总线的同一层上的像素电极。

公开(公告)号：US06697140B2

公开(公告)日：2004-02-24

申请号：US09781196

申请日：2001-02-13

申请人： Seong Moh Seo ,  Hyun Ho Shin ,  Young Jin Oh ,  Hyun Chang Lee ,  Chang Yeon Kim

发明人： Seong Moh Seo ,  Hyun Ho Shin ,  Young Jin Oh ,  Hyun Chang Lee ,  Chang Yeon Kim

IPC分类号： G02F11343

CPC分类号： G02F1/13458 ,  G02F1/134363 ,  G02F1/13452 ,  G02F1/136213

摘要： An in-plane switching mode liquid crystal display device comprises first and second substrates, a plurality of gate and data bus lines defining pixel regions and arranged on the first substrate, a plurality of data electrodes on same plane of the data bus lines these some parts are overlapped with adjacent gate bus line, a passivation layer on the data electrodes, a plurality of common electrodes on the passivation layer these some parts are overlapped with adjacent data electrodes, and a liquid crystal layer between the first and second substrates.

摘要翻译： 面内切换模式液晶显示装置包括第一和第二基板，多个限定像素区域的栅极和数据总线线路，并布置在第一基板上，多个数据电极在数据总线的同一平面上，这些部分 与相邻栅极总线重叠，数据电极上的钝化层，钝化层上的多个公共电极，这些一些部分与相邻的数据电极重叠，以及在第一和第二基板之间的液晶层。

公开(公告)号：US5969377A

公开(公告)日：1999-10-19

申请号：US854463

申请日：1997-05-12

申请人： Seong Moh Seo

发明人： Seong Moh Seo

IPC分类号： G02F1/136 ,  G02F1/1362 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/04 ,  H01L31/036 ,  H01L31/112 ,  H01L27/01

CPC分类号： G02F1/13454 ,  H01L27/1214

摘要： A thin film transistor substrate integrated with a driver circuit is provided for use in a liquid crystal display. The thin film transistor substrate includes a substrate having a pixel region and a driver region, a plurality of pixel driving thin film transistors formed in the pixel region, and a CMOS thin film transistor circuit formed in the driver region. Each of the plurality of pixel driving thin film transistors includes a channel region formed of an amorphous semiconductor, source and drain regions in contact with the channel region and formed of a polycrystalline semiconductor, and first and second transparent electrodes in contact with the source and drain regions, respectively. The CMOS thin transistor circuit includes a P-type thin film transistor and an N-type thin film transistor. Each of the P-type and N-type thin film transistors includes a channel region formed of a polycrystalline semiconductor and source and drain regions in contact with the channel region and formed of a polycrystalline semiconductor. Each of the P-type and N-type thin film transistors further includes third and fourth transparent electrodes in contact with the source and drain regions of the corresponding type thin film transistor, respectively, and source and drain electrodes in contact with the third and fourth transparent electrodes, respectively.

摘要翻译： 提供与驱动电路集成的薄膜晶体管基板用于液晶显示器。 薄膜晶体管基板包括具有像素区域和驱动器区域的基板，形成在像素区域中的多个像素驱动薄膜晶体管和形成在驱动器区域中的CMOS薄膜晶体管电路。 多个像素驱动薄膜晶体管中的每一个包括由非晶半导体形成的沟道区域，与沟道区域接触并由多晶半导体形成的源极和漏极区域，以及与源极和漏极接触的第一和第二透明电极 区域。 CMOS薄晶体管电路包括P型薄膜晶体管和N型薄膜晶体管。 P型和N型薄膜晶体管中的每一个包括由多晶半导体形成的沟道区域和与沟道区域接触并由多晶半导体形成的源极和漏极区域。 P型和N型薄膜晶体管中的每一个还分别包括与相应类型的薄膜晶体管的源极和漏极区域接触的第三和第四透明电极，以及与第三和第四晶体管接触的源极和漏极 透明电极。

公开(公告)号：US5877514A

公开(公告)日：1999-03-02

申请号：US853567

申请日：1997-05-09

申请人： Seong Moh Seo

发明人： Seong Moh Seo

IPC分类号： H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/04 ,  H01L31/036

CPC分类号： H01L27/1214

摘要： Provided is a method for fabricating a liquid crystal display device integrated with a driver circuit on a substrate, a surface of the substrate being divided into a P-channel region, an N-channel region, and a pixel region. The method includes the steps of forming a gate electrode on each of the P-channel, N-channel, and pixel regions of the substrate; forming a gate insulating layer on the entire surface of the substrate including the gate electrodes; forming a first transparent electrode layer over the gate insulating layer; forming a conductive layer over the first transparent electrode layer; forming a second transparent electrode layer over the conductive layer; removing portions of the first transparent electrode layer, the conductive layer, and the second transparent electrode layer to form source/drain electrodes adjacent the gate electrodes in each of the P-channel, N-channel, and pixel regions of the substrate; doping first impurities into the second transparent electrode layer in the P-channel region; doping second impurities into the second transparent electrode layer in the N-channel region and in the pixel region; forming a semiconductor layer over the entire surface of the substrate; annealing the semiconductor layer; forming a passivation layer over the entire surface of the substrate; and removing portions of the passivation layer, the second transparent electrode, and the conductive layer in the pixel region to expose a portion of the first transparent electrode layer.

摘要翻译： 本发明提供一种制造与衬底上的驱动电路集成的液晶显示装置的方法，该衬底的表面被分成P沟道区，N沟道区和像素区。 该方法包括在基板的P沟道，N沟道和像素区域的每一个上形成栅电极的步骤; 在包括所述栅电极的所述基板的整个表面上形成栅极绝缘层; 在所述栅绝缘层上形成第一透明电极层; 在第一透明电极层上形成导电层; 在所述导电层上形成第二透明电极层; 去除所述第一透明电极层，所述导电层和所述第二透明电极层的部分，以在所述衬底的所述P沟道，N沟道和像素区域中的每一个中形成与所述栅电极相邻的源/漏电极; 将第一杂质掺杂到P沟道区的第二透明电极层中; 将第二杂质掺杂到N沟道区域和像素区域中的第二透明电极层中; 在所述基板的整个表面上形成半导体层; 退火半导体层; 在衬底的整个表面上形成钝化层; 以及去除像素区域中的钝化层，第二透明电极和导电层的部分，以暴露第一透明电极层的一部分。

公开(公告)号：US08614462B2

公开(公告)日：2013-12-24

申请号：US13285584

申请日：2011-10-31

申请人： Hee-Dong Choi ,  Ki-Sul Cho ,  Seong-Moh Seo

发明人： Hee-Dong Choi ,  Ki-Sul Cho ,  Seong-Moh Seo

IPC分类号： H01L27/118

CPC分类号： H01L29/4908 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/3246 ,  H01L27/3265 ,  H01L2227/323

摘要： A method of fabricating an array substrate for an organic electroluminescent device includes forming a semiconductor layer of polysilicon in an element region, and a semiconductor pattern of polysilicon in a storage region on a substrate; forming a multiple-layered gate electrode corresponding to a center portion of the semiconductor layer and a first storage electrode corresponding to the semiconductor pattern; performing an impurity-doping to make a portion of the semiconductor layer not covered by the gate electrode into an ohmic contact layer and make the semiconductor pattern into a second storage electrode; forming source and drain electrodes and a third storage electrode corresponding to the first storage electrode; forming a first electrode contacting the drain electrode and a fourth storage electrode corresponding to the third storage electrode.

摘要翻译： 一种制造有机电致发光器件用阵列基板的方法包括：在元件区域中形成多晶硅的半导体层，以及在基板上的存储区域中形成多晶硅的半导体图案; 形成对应于所述半导体层的中心部分的多层栅电极和对应于所述半导体图案的第一存储电极; 进行杂质掺杂，使未被栅电极覆盖的半导体层的一部分成为欧姆接触层，并使半导体图案成为第二存储电极; 形成源极和漏极;以及对应于第一存储电极的第三存储电极; 形成与所述漏电极接触的第一电极和对应于所述第三存储电极的第四存储电极。