公开(公告)号：US20120254654A1

公开(公告)日：2012-10-04

申请号：US13076767

申请日：2011-03-31

申请人： Stephen L. BLINICK ,  Scott A. BREWER ,  Yu-Cheng HSU

发明人： Stephen L. BLINICK ,  Scott A. BREWER ,  Yu-Cheng HSU

IPC分类号： G06F11/20

CPC分类号： G06F11/2028 ,  G06F11/2038 ,  G06F11/2046

摘要： Methods are provided in which a standby server, a first main server, and a second main server to control shared input/output (I/O) adapters in a storage system are provided. The standby server is in communication with the first main server and the second main server, and the storage system is configured to operate as a dual node active system. The methods include activating the standby server in response to receiving a communication from the first main server of a fail mode of the second main server. Systems and physical computer storage media are also provided.

摘要翻译： 提供了一种方法，其中提供了用于控制存储系统中的共享输入/输出（I / O）适配器的备用服务器，第一主服务器和第二主服务器。 备用服务器与第一主服务器和第二主服务器通信，并且存储系统被配置为作为双节点活动系统来操作。 这些方法包括响应于从第一主服务器接收到第二主服务器的故障模式的通信来激活备用服务器。 还提供系统和物理计算机存储介质。

公开(公告)号：US07596651B2

公开(公告)日：2009-09-29

申请号：US11754821

申请日：2007-05-29

申请人： Stephen L. Blinick ,  Carol Spanel ,  Andrew Dale Walls

发明人： Stephen L. Blinick ,  Carol Spanel ,  Andrew Dale Walls

IPC分类号： G06F9/06

CPC分类号： G06F13/385

摘要： One embodiment of an adapter card in accordance with the invention includes a circuit board connectable to a motherboard of a computer system. A logic chip is connected to the circuit board to provide functionality to the adapter card. One or more programmable devices are connected to the circuit board and store data read by the logic chip upon initialization. This data may include first character data to program the logic chip to have a first character and second character data to program the logic chip to have a second character. A switching mechanism is provided to switch between the first and second character data in response to an external input, thereby causing the logic chip to read one of the first and second character data.

摘要翻译： 根据本发明的适配器卡的一个实施例包括可连接到计算机系统的主板的电路板。 逻辑芯片连接到电路板以向适配器卡提供功能。 一个或多个可编程设备连接到电路板，并在初始化时存储由逻辑芯片读取的数据。 该数据可以包括用于对逻辑芯片编程以具有第一字符和第二字符数据的第一字符数据，以将逻辑芯片编程为具有第二字符。 提供切换机制以响应于外部输入在第一和第二字符数据之间切换，从而使逻辑芯片读取第一和第二字符数据之一。

公开(公告)号：US20080263255A1

公开(公告)日：2008-10-23

申请号：US11738142

申请日：2007-04-20

申请人： Stephen L. Blinick ,  Cheng-Chung Song ,  Carol Spanel ,  Andrew Dale Walls

发明人： Stephen L. Blinick ,  Cheng-Chung Song ,  Carol Spanel ,  Andrew Dale Walls

IPC分类号： G06F13/36

CPC分类号： G06F11/2038 ,  G06F11/2033 ,  G06F11/2046

摘要： An apparatus, system, and method are disclosed for adapter card failover. A switch module connects a first processor complex to an adapter card through a first port as an owner processor complex. The owner processor complex manages the adapter card except for a second port and receives error messages from the adapter card. The switch module further connects a second processor complex to the adapter card through the second port as a non-owner processor complex. The non-owner processor complex manages the second port. A detection module detects a failure of the first processor complex. A setup module modifies the switch module to logically connect the second processor complex to the adapter card as the owner processor complex and to logically disconnect the first processor complex from the adapter card in response to detecting the failure.

公开(公告)号：US08898653B2

公开(公告)日：2014-11-25

申请号：US11769083

申请日：2007-06-27

申请人： Stephen L. Blinick ,  Chiahong Chen

发明人： Stephen L. Blinick ,  Chiahong Chen

IPC分类号： G06F9/44 ,  G06F9/445

CPC分类号： G06F9/44505 ,  G06F8/65 ,  G06F9/4401

摘要： Updating code of a single processor in a multi-processor system includes halting transactions processed by a first processor in the system and processing of transactions by a second processor in the system are maintained. The first processor then receives new code and an operating system running on the first processor is terminated whereby all processes and threads being executed by the first processor are terminated. Execution of a self-reset of the first processor is commenced and interrupts associated with the first processor are disabled. Only those system resources exclusively associated with the first processor are reset, and memory transactions associated with the first processor are disabled. An image of the new code is copied into memory associated with the first processor, registers associated with the first processor are reset and the new code is booted by the first processor.

摘要翻译： 在多处理器系统中更新单个处理器的代码包括停止由系统中的第一处理器处理的事务，并且维护由系统中的第二处理器处理事务的处理。 然后，第一处理器接收新的代码，并且终止在第一处理器上运行的操作系统，由此终止由第一处理器执行的所有进程和线程。 开始执行第一处理器的自复位，并且禁用与第一处理器相关联的中断。 只有与第一处理器完全相关联的系统资源被重置，并且与第一处理器相关联的存储器事务被禁用。 将新代码的图像复制到与第一处理器相关联的存储器中，与第一处理器相关联的寄存器被复位，并且新代码由第一处理器引导。

公开(公告)号：US20130232295A1

公开(公告)日：2013-09-05

申请号：US13466861

申请日：2012-05-08

申请人： Michael T. Benhase ,  Stephen L. Blinick ,  Evangelos S. Eleftheriou ,  Lokesh M. Gupta ,  Robert Haas ,  Xiao-Yu Hu ,  Ioannis Koltsidas ,  Roman A. Pletka

发明人： Michael T. Benhase ,  Stephen L. Blinick ,  Evangelos S. Eleftheriou ,  Lokesh M. Gupta ,  Robert Haas ,  Xiao-Yu Hu ,  Ioannis Koltsidas ,  Roman A. Pletka

IPC分类号： G06F12/08

CPC分类号： G06F12/128 ,  G06F12/126

摘要： Provided are a computer program product, system, and method for managing data in a first cache and a second cache. A reference count is maintained in the second cache for the page when the page is stored in the second cache. It is determined that the page is to be promoted from the second cache to the first cache. In response to determining that the reference count is greater than zero, the page is added to a Least Recently Used (LRU) end of an LRU list in the first cache. In response to determining that the reference count is less than or equal to zero, the page is added to a Most Recently Used (LRU) end of the LRU list in the first cache.

公开(公告)号：US20130111134A1

公开(公告)日：2013-05-02

申请号：US13286454

申请日：2011-11-01

申请人： Michael T. BENHASE ,  Stephen L. BLINICK ,  Evangelos S. ELEFTHERIOU ,  Lokesh M. GUPTA ,  Robert HAAS ,  Xiao-Yu HU ,  Matthew J. KALOS ,  Ioannis KOLTSIDAS ,  Roman A. PLETKA

发明人： Michael T. BENHASE ,  Stephen L. BLINICK ,  Evangelos S. ELEFTHERIOU ,  Lokesh M. GUPTA ,  Robert HAAS ,  Xiao-Yu HU ,  Matthew J. KALOS ,  Ioannis KOLTSIDAS ,  Roman A. PLETKA

IPC分类号： G06F12/08

CPC分类号： G06F12/128 ,  G06F12/0811 ,  G06F12/0868 ,  G06F12/0891 ,  G06F12/0897 ,  G06F12/126 ,  G06F2212/1021 ,  G06F2212/1041 ,  G06F2212/222 ,  G06F2212/283

摘要： Various embodiments for movement of partial data segments within a computing storage environment having lower and higher levels of cache by a processor are provided. In one such embodiment, a whole data segment containing one of the partial data segments is promoted to both the lower and higher levels of cache. Requested data of the whole data segment is split and positioned at a Most Recently Used (MRU) portion of a demotion queue of the higher level of cache. Unrequested data of the whole data segment is split and positioned at a Least Recently Used (LRU) portion of the demotion queue of the higher level of cache. The unrequested data is pinned in place until a write of the whole data segment to the lower level of cache completes. Additional system and computer program product embodiments are disclosed and provide related advantages.

摘要翻译： 提供了用于在计算存储环境中移动部分数据段的各种实施例，其由处理器具有较低级和更高级别的高速缓存。 在一个这样的实施例中，包含部分数据段之一的整个数据段被提升到较低级和更高级的高速缓存。 整个数据段的请求数据被分割并定位在较高级缓存的降级队列的最近使用（MRU）部分。 整个数据段的未请求的数据被分割并定位在较高级别的缓存的降级队列的最近最少使用（LRU）部分。 未请求的数据被固定到位，直到整个数据段写入缓存的较低级别完成。 公开了附加的系统和计算机程序产品实施例并提供相关的优点。

公开(公告)号：US20130111133A1

公开(公告)日：2013-05-02

申请号：US13285740

申请日：2011-10-31

申请人： MICHAEL T. BENHASE ,  STEPHEN L. BLINICK ,  EVANGELOS S. ELEFTHERIOU ,  LOKESH M. GUPTA ,  ROBERT HAAS ,  XIAO-YU HU ,  IOANNIS KOLTSIDAS ,  ROMAN A. PLETKA

发明人： MICHAEL T. BENHASE ,  STEPHEN L. BLINICK ,  EVANGELOS S. ELEFTHERIOU ,  LOKESH M. GUPTA ,  ROBERT HAAS ,  XIAO-YU HU ,  IOANNIS KOLTSIDAS ,  ROMAN A. PLETKA

IPC分类号： G06F12/08

CPC分类号： G06F12/0888 ,  G06F12/0866 ,  G06F12/0897 ,  G06F2212/225

摘要： The population of data to be inserted into secondary data storage cache is controlled by determining a heat metric of candidate data; adjusting a heat metric threshold; rejecting candidate data provided to the secondary data storage cache whose heat metric is less than the threshold; and admitting candidate data whose heat metric is equal to or greater than the heat metric threshold. The adjustment of the heat metric threshold is determined by comparing a reference metric related to hits of data most recently inserted into the secondary data storage cache, to a reference metric related to hits of data most recently evicted from the secondary data storage cache; if the most recently inserted reference metric is greater than the most recently evicted reference metric, decrementing the threshold; and if the most recently inserted reference metric is less than the most recently evicted reference metric, incrementing the threshold.

摘要翻译： 通过确定候选数据的热度量来控制要插入到辅助数据存储高速缓存中的数据的总数; 调整热量度量阈值; 拒绝提供给热度量小于阈值的次数据存储高速缓存的候选数据; 并且允许其热度量等于或大于热度量阈值的候选数据。 通过将与最近插入次级数据存储高速缓存中的数据的命中相关的参考度量与与次级数据存储高速缓存最近被排出的数据的命中相关的参考度量进行比较来确定热度量阈值的调整; 如果最近插入的参考度量值大于最近被驱逐的参考度量，则递减阈值; 并且如果最近插入的参考度量小于最近驱逐的参考度量，则递增阈值。

公开(公告)号：US20120096469A1

公开(公告)日：2012-04-19

申请号：US12904715

申请日：2010-10-14

申请人： Stephen L. BLINICK ,  Steven E. KLEIN ,  Daniel W. SHERMAN

发明人： Stephen L. BLINICK ,  Steven E. KLEIN ,  Daniel W. SHERMAN

IPC分类号： G06F9/46

CPC分类号： G06F9/4843

摘要： Systems and methods for scanning ports for work are provided. One system includes one or more processors, multiple ports, a first tracking mechanism, and a second tracking mechanism for tracking high priority work and low priority work, respectively. The processor(s) is/are configured to perform the below method. One method includes scanning the ports, finding high priority work on a port, and accepting or declining the high priority work. The method further includes changing a designation of the processor to TRUE in the first tracking mechanism if the processor accepts the high priority work such that the processor is allowed to perform the high priority work on the port. Also provided are computer storage mediums including computer code for performing the above method.

摘要翻译： 提供扫描工作端口的系统和方法。 一个系统包括分别用于跟踪高优先级工作和低优先级工作的一个或多个处理器，多个端口，第一跟踪机构和第二跟踪机构。 处理器被配置为执行以下方法。 一种方法包括扫描端口，在端口上找到高优先级的工作，以及接受或拒绝高优先级的工作。 该方法还包括如果处理器接受高优先级的工作，使处理器能够在端口上执行高优先级的工作，则在第一跟踪机构中将处理器的指定改变为TRUE。 还提供了包括用于执行上述方法的计算机代码的计算机存储介质。

公开(公告)号：US07669050B2

公开(公告)日：2010-02-23

申请号：US10877910

申请日：2004-06-24

申请人： Stephen L. Blinick ,  Yu-Cheng Hsu

发明人： Stephen L. Blinick ,  Yu-Cheng Hsu

IPC分类号： H04L29/06

CPC分类号： G06F9/468

摘要： A method to enable a user mode process to operate in a privileged execution mode is disclosed. Applicants' method provides an operating system comprising a privileged execution mode and a non-privileged execution mode, and a plurality of user mode strings operating in the non-privileged execution mode. The computing device receives a request from a first user mode string to operate in the privileged execution mode to perform one or more designated tasks. Applicants' method authorizes the first user mode string to operate in the privileged execution mode, and the first user mode string performs those one or more designated tasks using the privileged execution mode. Applicants' method continues to permit the first user mode string to operate in the privileged execution mode after completion of the one or more designated tasks.

摘要翻译： 公开了一种使用户模式进程能够以特权执行模式运行的方法。 申请人的方法提供包括特权执行模式和非特权执行模式的操作系统以及以非特权执行模式操作的多个用户模式串。 计算设备接收来自第一用户模式串的请求，以在特权执行模式下操作以执行一个或多个指定的任务。 申请人的方法授权第一用户模式字符串在特权执行模式下运行，第一用户模式字符串使用特权执行模式执行那些一个或多个指定任务。 申请人的方法继续允许第一用户模式字符串在完成一个或多个指定任务之后以特权执行模式操作。

公开(公告)号：US20080155549A1

公开(公告)日：2008-06-26

申请号：US11613613

申请日：2006-12-20

申请人： Stephen L. Blinick ,  Scott A. Brewer ,  Chiahong Chen ,  Daniel A. Heffley ,  Radha K. Ramachandran

发明人： Stephen L. Blinick ,  Scott A. Brewer ,  Chiahong Chen ,  Daniel A. Heffley ,  Radha K. Ramachandran

IPC分类号： G06F9/46

CPC分类号： G06F9/485

摘要： A sleep function capable of putting a fixed high-priority thread to sleep within a time-window is disclosed. After a sleep request has been made by a fixed high-priority thread via the sleep function, a determination is made whether or not the fixed high-priority thread is awoken before a requested sleep duration under the sleep request. If the fixed high-priority thread is awoken before the requested sleep duration, the number of tasks for the fixed high-priority thread to perform is increased in order to delay the start sleep time of the fixed high-priority thread from a point within a first time-window in which the sleep request was made to an end boundary of the first time-window.

摘要翻译： 公开了能够使固定的高优先级线程在时间窗内睡眠的睡眠功能。 在通过睡眠功能由固定的高优先级线程进行了睡眠请求之后，确定在睡眠请求之前的所请求的睡眠持续时间之前固定的高优先级线程是否被唤醒。 如果固定的高优先级线程在所请求的睡眠持续时间之前被唤醒，则增加固定高优先级线程的任务数量，以便将固定的高优先级线程的开始休眠时间从 睡眠请求的第一个时间窗口到达第一个时间窗口的结束边界。