公开(公告)号：US20070004123A1

公开(公告)日：2007-01-04

申请号：US11173660

申请日：2005-06-30

Applicant: Mark Bohr ,  Steven Keating ,  Thomas Letson ,  Anand Murthy ,  Donald O'Neill ,  Willy Rachmady

Inventor： Mark Bohr ,  Steven Keating ,  Thomas Letson ,  Anand Murthy ,  Donald O'Neill ,  Willy Rachmady

IPC: H01L21/8238

CPC classification number: H01L29/045 ,  H01L21/30608 ,  H01L29/165 ,  H01L29/665 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/78 ,  H01L29/7848

Abstract: Embodiments are an improved transistor structure and the method of fabricating the structure. In particular, a wet etch of an embodiment forms source and drain regions with an improved tip shape to improve the performance of the transistor by improving control of short channel effects, increasing the saturation current, improving control of the metallurgical gate length, increasing carrier mobility, and decreasing contact resistance at the interface between the source and drain and the silicide.

Abstract translation: 实施例是改进的晶体管结构和制造该结构的方法。 特别地，实施例的湿蚀刻形成具有改进的尖端形状的源极和漏极区域，以通过改善短沟道效应的控制，增加饱和电流，改善冶金栅极长度的控制，增加载流子迁移率来提高晶体管的性能 并且在源极和漏极与硅化物之间的界面处降低接触电阻。

公开(公告)号：US06703291B1

公开(公告)日：2004-03-09

申请号：US10322390

申请日：2002-12-17

Applicant: Boyan Boyanov ,  Steven Keating ,  Anand Murthy

Inventor： Boyan Boyanov ,  Steven Keating ,  Anand Murthy

IPC: H01L2974

CPC classification number: H01L29/665 ,  C23F1/26 ,  H01L21/28255 ,  H01L21/28518 ,  H01L21/32134 ,  H01L21/324

Abstract: The wet etch stage of the salicide process normally used to fabricate polysilicon and silicon-based semiconductor transistors may not be appropriate for germanium-based transistors because the wet etch chemicals at such temperatures will dissolve the germanium leaving no source, gate, or drain for the transistor. In embodiments of the invention, nickel is blanket deposited over the source, drain, and gate regions of the germanium-based transistor, annealed to cause the nickel to react with the germanium, and wet etched to remove un-reacted nickel from dielectric regions (e.g., shallow trench isolation (STI) regions) but leave NiGe in the source, gate, and drain regions. The wet etch is a mild oxidizing solution at room temperature.

Abstract translation: 通常用于制造多晶硅和硅基半导体晶体管的自对准硅化物工艺的湿蚀刻阶段可能不适用于基于锗的晶体管，因为在这样的温度下的湿蚀刻化学品将溶解锗，不会留下源，栅极或漏极 晶体管。 在本发明的实施例中，镍被覆盖地沉积在锗基晶体管的源极，漏极和栅极区域上，退火以使镍与锗反应，并进行湿式蚀刻以从电介质区域去除未反应的镍（ 例如浅沟槽隔离（STI）区域），而在源极，栅极和漏极区域留下NiGe。 湿蚀刻在室温下是温和的氧化溶液。