公开(公告)号：US5377050A

公开(公告)日：1994-12-27

申请号：US73674

申请日：1993-06-08

Applicant: Jong-Kyoung Yun

Inventor： Jong-Kyoung Yun

IPC: G11B5/09 ,  G11B5/008 ,  G11B15/18 ,  G11B15/467 ,  G11B20/10 ,  H04N5/7826 ,  H04N5/783 ,  H04N5/92 ,  H04N5/926 ,  H04N5/945 ,  H04N9/804 ,  G11B5/00 ,  H04N5/78 ,  H04N5/95

CPC classification number: H04N5/9261 ,  G11B15/1875 ,  G11B20/10527 ,  G11B5/0086 ,  H04N5/783 ,  H04N5/945 ,  H04N9/8047 ,  G11B15/4671 ,  H04N5/78263

Abstract: The present invention relates to a digital image signal recording/reproducing apparatus and the method thereof which can maintain a track spacing whereto a digital image signal is recorded during a long time mode in the same way as in the normal mode when the digital image signal is recorded on the recording medium, so that the crosstalks between channels caused by narrowed channel spacing of a tape can be prevented to thereby obtain an effect of a clear picture without a picture quality degradation.

Abstract translation: 数字图像信号记录/再现装置及其方法本发明涉及一种数字图像信号记录/再现装置及其方法，其可以在长时间模式下以与正常模式相同的方式保持数字图像信号的轨迹间隔，当数字图像信号为 记录在记录介质上，从而可以防止由带的窄通道间隔引起的信道之间的串扰，从而获得清晰图像的效果，而不会降低图像质量。

公开(公告)号：US07547936B2

公开(公告)日：2009-06-16

申请号：US11246594

申请日：2005-10-06

Applicant: Doo-Hoon Goo ,  Han-Ku Cho ,  Joo-Tae Moon ,  Sang-Gyun Woo ,  Gi-Sung Yeo ,  Kyoung-Yun Baek

Inventor： Doo-Hoon Goo ,  Han-Ku Cho ,  Joo-Tae Moon ,  Sang-Gyun Woo ,  Gi-Sung Yeo ,  Kyoung-Yun Baek

IPC: H01L271/108

CPC classification number: H01L27/11502 ,  H01L27/0207 ,  H01L27/10814 ,  H01L27/10852 ,  H01L27/10855

Abstract: A semiconductor memory device may include a substrate having a plurality of active regions and a field isolation layer on the substrate surrounding the active regions of the substrate. Each of the plurality of active regions may have a length in a direction of a first axis and a width in a direction of a second axis, and the length may be greater than the width. The plurality of active regions may be provided in a plurality of columns of active regions in the direction of the second axis, and active regions of adjacent columns may be offset in the direction of the second axis.

Abstract translation: 半导体存储器件可以包括具有多个有源区的衬底和围绕衬底的有源区的衬底上的场隔离层。 多个有源区域中的每一个可以具有在第一轴线的方向上的长度和在第二轴线的方向上的宽度，并且该长度可以大于宽度。 多个有源区域可以沿着第二轴线的方向设置在多个活性区域列中，并且相邻列的有效区域可以在第二轴线的方向上偏移。

公开(公告)号：US20070155432A1

公开(公告)日：2007-07-05

申请号：US10560512

申请日：2004-07-23

Applicant: Kyoung Yun

Inventor： Kyoung Yun

IPC: H04B1/38 ,  H04M1/00

CPC classification number: H04B1/7097

Abstract: In a transmission/reception apparatus in a base transceiver station (BTS), a commercial surface acoustic wave filter (SAW filter) can be used for suppressing transmission signals interfering with the reception path. By suppressing the interference signals, the reception sensitivity can be improved. In one embodiment of the present invention, an apparatus for processing trans-mission/reception signals in a BTS, comprises: a coupler connected to an antenna for providing reception signals; a duplexer having three terminals for routing the reception signals at a first terminal to a second terminal of the duplexer, and routing transmission signals at a third terminal of the duplexer to the first terminal, the coupler being further operative to provide the transmission signals at the first terminal to the antenna; and a narrow band low-noise amplifier connected to the second terminal for amplifying the reception signals from the second terminal, the narrow band low-noise amplifier being operative to suppress out-of-band interference signals such that reception sensitivity can be improved.

Abstract translation: 在基站收发台（BTS）的发送接收装置中，商业弹性表面波滤波器（SAW滤波器）可以用于抑制干扰接收路径的发送信号。 通过抑制干扰信号，可以提高接收灵敏度。 在本发明的一个实施例中，一种在BTS中处理传输/接收信号的装置，包括：连接到天线的耦合器，用于提供接收信号; 一个双工器具有三个终端，用于将第一终端处的接收信号路由到双工器的第二终端，以及将双工器的第三终端处的传输信号路由到第一终端，耦合器进一步可操作以在 天线的第一个终端; 连接到第二端子的窄带低噪声放大器，用于放大来自第二端子的接收信号，窄带低噪声放大器用于抑制带外干扰信号，从而可以提高接收灵敏度。

公开(公告)号：US5142378A

公开(公告)日：1992-08-25

申请号：US370713

申请日：1989-06-23

Applicant: Jong-Kyoung Yun

Inventor： Jong-Kyoung Yun

IPC: H04N9/793 ,  H04N9/83 ,  H04N9/87

CPC classification number: H04N9/83 ,  H04N9/793 ,  H04N9/8707

Abstract: A low band converter for recording color signals converted in low band onto a video tape media of a VTR system. The inventive converter for use in a video tape recorder is capable of converting color signals thereof in low band, so that phase and frequency of the color signals may be correctly coincident with those of a horizontal synchronization signal in the VTR, by first demodulating and next modulating by way of synthesizing the color-differential signals from the color signals. An apparatus for achieving the converter includes a burst gate generator BGPG, a pulse synthesizer, a first delay circuit, a second delay circuit, a burst amplifier, a color signal demodulator, a first modulator, a second modulator, a mixer, a first detector and a second detector, a color gain converter ACC, a video recording amplifier, a color killer suited, and a low pass filter 100.

Abstract translation: 用于将在低频转换的彩色信号记录到VTR系统的录像带介质上的低频转换器。 用于磁带录像机的本发明的转换器能够在低频带中转换其色彩信号，从而通过第一次解调和下一个信号，可以使彩色信号的相位和频率与VTR中的水平同步信号的相位和频率一致 通过从彩色信号合成色差信号进行调制。 一种用于实现转换器的装置包括突发门限生成器BGPG，脉冲合成器，第一延迟电路，第二延迟电路，脉冲串放大器，彩色信号解调器，第一调制器，第二调制器，混频器，第一检测器 以及第二检测器，彩色增益转换器ACC，视频记录放大器，适合的颜色抑制器和低通滤波器100。

公开(公告)号：US20150017253A1

公开(公告)日：2015-01-15

申请号：US14382800

申请日：2013-03-27

Applicant: Kyoung Yun OK ,  Eun Hee OK

Inventor： Hak Bum Kim

IPC: A61K33/36 ,  A61K35/64 ,  A61K33/28 ,  A61K36/18 ,  A61K36/714 ,  A61K33/06 ,  A61K35/50 ,  A61K36/61 ,  A61K35/413

CPC classification number: A61K33/36 ,  A61K31/555 ,  A61K33/06 ,  A61K33/28 ,  A61K35/413 ,  A61K35/50 ,  A61K35/60 ,  A61K35/64 ,  A61K35/646 ,  A61K36/18 ,  A61K36/61 ,  A61K36/714 ,  A61K2300/00

Abstract: The present invention relates to a composition for preventing or treating an immune-related disease, and, more specifically, relates to a composition for preventing or treating immune-related diseases or oxidative-stress-related diseases in which the toxicity of an arsenic compound is effectively suppressed while the immune function boosting effect thereof is nevertheless maximised. The composition according to the present invention is useful in preventing or treating various immune-related diseases or oxidative-stress-related diseases since the composition reduces the toxicity of arsenic compounds, which traditionally have been difficult to use in clinical practice due to toxicity, while nevertheless maximising the pharmacological effects thereof.

Abstract translation: 本发明涉及用于预防或治疗免疫相关疾病的组合物，更具体地涉及用于预防或治疗免疫相关疾病或氧化应激相关疾病的组合物，其中砷化合物的毒性为 在免疫功能增强作用最大化的同时有效抑制。 根据本发明的组合物可用于预防或治疗各种免疫相关疾病或氧化应激相关疾病，因为该组合物降低了由于毒性而在临床实践中传统上难以使用的砷化合物的毒性，而 但是最大化其药理作用。

公开(公告)号：US08689150B2

公开(公告)日：2014-04-01

申请号：US13406655

申请日：2012-02-28

Applicant: Jee-eun Jung ,  Kyoung-yun Baek ,  Seong-woon Choi

Inventor： Jee-eun Jung ,  Kyoung-yun Baek ,  Seong-woon Choi

IPC: G06F17/50

CPC classification number: G03F7/70125 ,  G03F1/70

Abstract: A method of fabricating a semiconductor device includes preparing a layout of the semiconductor device, obtaining contrast of an exposure image of the layout through a simulation under a condition of using a crosspole illumination system, separating the layout into a plurality of sub-layouts based on the contrast of the exposure image, forming a photomask having a mask pattern corresponding to the plurality of sub-layouts, and performing an exposure process using the photomask under an exposure condition of using a dipole illumination system.

Abstract translation: 一种制造半导体器件的方法包括：准备半导体器件的布局，在使用交叉极照明系统的条件下通过仿真获得布局的曝光图像的对比度，将布局分为多个子布局 曝光图像的对比度，形成具有对应于多个子布局的掩模图案的光掩模，以及在使用偶极照明系统的曝光条件下使用光掩模进行曝光处理。

公开(公告)号：US08084801B2

公开(公告)日：2011-12-27

申请号：US12654255

申请日：2009-12-15

Applicant: Kyoung-Yun Baek ,  Yong-Sun Ko ,  Hak Kim ,  Yong-Kug Bae

Inventor： Kyoung-Yun Baek ,  Yong-Sun Ko ,  Hak Kim ,  Yong-Kug Bae

IPC: H01L21/336

CPC classification number: H01L27/0207 ,  H01L27/10888

Abstract: In a 6F2 cell structure of a memory device and a method of fabricating the same, the plurality of active regions may have a first area at both end portions and a second area at a central portion. A portion of a bit-line contact pad may be positioned on the second area and the other portion may be positioned on a third area of the substrate that may not overlap with the plurality of active regions. The bit line may be connected with the bit-line contact pad at the third area. The cell structure may be more easily formed despite a 6F2-structured unit cell. The plurality of active regions may have an elliptical shape including major and minor axes. The plurality of active regions may be positioned in a major axis direction to thereby form an active row, and may be positioned in a minor axis direction in such a structure that a center of the plurality of active regions is shifted from that of an adjacent active region in a neighboring active row.

Abstract translation: 在存储器件的6F2单元结构及其制造方法中，多个有源区可以在两端部具有第一区域，在中心部分可以具有第二区域。 位线接触焊盘的一部分可以位于第二区域上，另一部分可以位于基板的不与多个有源区域重叠的第三区域上。 位线可以与第三区域的位线接触焊盘连接。 尽管6F2结构的单元电池，电池结构也可以更容易地形成。 多个有源区域可以具有包括主轴和短轴的椭圆形状。 多个有源区域可以被定位在长轴方向上，从而形成有源行，并且可以以这样的结构定位在短轴方向上，使得多个有源区域的中心与相邻的活动区域的中心 相邻活动行中的区域。

公开(公告)号：US08013375B2

公开(公告)日：2011-09-06

申请号：US12465234

申请日：2009-05-13

Applicant: Duo-Hoon Goo ,  Han-Ku Cho ,  Joo-Tac Moon ,  Sang-Gyun Woo ,  Gi-Sung Yeo ,  Kyoung-Yun Baek

Inventor： Duo-Hoon Goo ,  Han-Ku Cho ,  Joo-Tac Moon ,  Sang-Gyun Woo ,  Gi-Sung Yeo ,  Kyoung-Yun Baek

IPC: H01L27/108

CPC classification number: H01L27/10814 ,  H01L27/0207 ,  H01L27/10882 ,  H01L27/11502

Abstract: A semiconductor memory device may include a semiconductor substrate having a plurality of active regions wherein each active region has a length in a direction of a first axis and a width in a direction of a second axis. The length may be greater than the width, and the plurality of active regions may be provided in a plurality of columns in the direction of the second axis. A plurality of wordline pairs may be provided on the substrate, with each wordline pair crossing active regions of a respective column of active regions defining a drain portion of each active region between wordlines of the respective wordline pair. A plurality of bitlines on the substrate may cross the plurality of wordline pairs, with each bitline being electrically coupled to a drain portion of a respective active region of each column, and with each bitline crossing drain portions of active regions of adjacent columns in different directions so that different portions of a same bitline are aligned in different directions on different active regions of adjacent columns.

Abstract translation: 半导体存储器件可以包括具有多个有源区的半导体衬底，其中每个有源区具有在第一轴的方向上的长度和在第二轴的方向上的宽度。 长度可以大于宽度，并且多个有源区域可以在第二轴线的方向上以多个列设置。 可以在衬底上提供多个字线对，其中每个字线对跨越相应的有效区域列的有源区域，在相应字线对的字线之间限定每个有效区域的漏极部分。 衬底上的多个位线可以跨越多个字线对，每个位线电耦合到每列的相应有源区的漏极部分，并且每个位线在不同方向上与相邻列的有源区域的漏极部分交叉 使得相同位线的不同部分在相邻列的不同有效区域上在不同方向上对准。

公开(公告)号：US20090218654A1

公开(公告)日：2009-09-03

申请号：US12465261

申请日：2009-05-13

Applicant: Don-Hoon Goo ,  Han-Ku Cho ,  Joo-Tae Moon ,  Sang-Gyun Woo ,  Gi-Sung Yeo ,  Kyoung-Yun Baek

Inventor： Don-Hoon Goo ,  Han-Ku Cho ,  Joo-Tae Moon ,  Sang-Gyun Woo ,  Gi-Sung Yeo ,  Kyoung-Yun Baek

IPC: H01L29/06 ,  H01L29/68

CPC classification number: H01L27/10814 ,  H01L27/0207 ,  H01L27/10882 ,  H01L27/11502

Abstract: A semiconductor memory device may include a semiconductor substrate having an active region thereof, and the active region may have a length and a width, with the length being greater than the width. A field isolation layer may be on the semiconductor substrate surrounding the active region. First and second wordlines may be on the substrate crossing the active region, with the first and second wordlines defining a drain portion of the active region between the first and second wordlines and first and second source portions of the active region at opposite ends of the active region. First and second memory storage elements may be respectively coupled to the first and second source portions of the active region, with the first and second wordlines being between portions of the respective first and second memory storage elements and the active region in a direction perpendicular to a surface of the substrate.

Abstract translation: 半导体存储器件可以包括具有其有源区的半导体衬底，并且有源区可以具有长度和宽度，其长度大于宽度。 场隔离层可以在围绕有源区的半导体衬底上。 第一和第二字线可以在与有源区交叉的衬底上，其中第一和第二字线限定在第一和第二字线之间的有源区的漏极部分和有源区的第一和第二源极部分在有源区域的相对端处 地区。 第一和第二存储器存储元件可以分别耦合到有源区域的第一和第二源极部分，其中第一和第二字线在相应的第一和第二存储器存储元件的部分之间，并且有源区域在垂直于 基板的表面。

公开(公告)号：US20070096155A1

公开(公告)日：2007-05-03

申请号：US11581359

申请日：2006-10-17

Applicant: Kyoung-Yun Baek ,  Yong-Sun Ko ,  Hak Kim ,  Yong-Kug Bae

Inventor： Kyoung-Yun Baek ,  Yong-Sun Ko ,  Hak Kim ,  Yong-Kug Bae

IPC: H01L27/10 ,  H01L29/73

CPC classification number: H01L27/0207 ,  H01L27/10888

Abstract: In a 6F2 cell structure of a memory device and a method of fabricating the same, the plurality of active regions may have a first area at both end portions and a second area at a central portion. A portion of a bit-line contact pad may be positioned on the second area and the other portion may be positioned on a third area of the substrate that may not overlap with the plurality of active regions. The bit line may be connected with the bit-line contact pad at the third area. The cell structure may be more easily formed despite a 6F2-structured unit cell. The plurality of active regions may have an elliptical shape including major and minor axes. The plurality of active regions may be positioned in a major axis direction to thereby form an active row, and may be positioned in a minor axis direction in such a structure that a center of the plurality of active regions is shifted from that of an adjacent active region in a neighboring active row.

Abstract translation: 在存储器件的6F <2> 单元结构及其制造方法中，多个有源区可以在两端部具有第一区域，在中心部分可以具有第二区域。 位线接触焊盘的一部分可以位于第二区域上，另一部分可以位于基板的不与多个有源区域重叠的第三区域上。 位线可以与第三区域的位线接触焊盘连接。 尽管6F 2结构单位电池，电池结构可能更容易形成。 多个有源区域可以具有包括主轴和短轴的椭圆形状。 多个有源区域可以被定位在长轴方向上，从而形成有源行，并且可以以这样的结构定位在短轴方向上，使得多个有源区域的中心与相邻的活动区域的中心 相邻活动行中的区域。