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公开(公告)号：US20240193016A1
公开(公告)日：2024-06-13
申请号：US18064170
申请日：2022-12-09
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor： AnZhong Huang , Zhengsan Jian , Yinan Jiang
CPC classification number: G06F9/544 , G06F12/023
Abstract: An apparatus and method for efficiently executing multiple processes by reducing an amount of memory usage of the processes. In various implementations, a computing system includes a first processor and a second processor that support parallel data applications stored on a remote server that provides cloud computing services to multiple users. The first processor creates multiple processes, referred to as “instances” in parallel computing platforms, for a particular application as users request to execute the application. When the first processor detects a function call of the application within a particular instance, the first processor searches for shareable data objects to be used by the second processor when executing the first instance of the function call, and frees data storage allocated to data objects that are already shared by one or more instances. Therefore, an amount of memory allocated for the multiple instances of the application is reduced.
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公开(公告)号：US11100604B2
公开(公告)日：2021-08-24
申请号：US16263709
申请日：2019-01-31
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor： Jeffrey Gongxian Cheng , Ahmed M. Abdelkhalek , Yinan Jiang , Xingsheng Wan , Anthony Asaro , David Martinez Nieto
Abstract: Systems, apparatuses, and methods for scheduling jobs for multiple frame-based applications are disclosed. A computing system executes a plurality of frame-based applications for generating pixels for display. The applications convey signals to a scheduler to notify the scheduler of various events within a given frame being rendered. The scheduler adjusts the priorities of applications based on the signals received from the applications. The scheduler attempts to adjust priorities of applications and schedule jobs from these applications so as to minimize the perceived latency of each application. When an application has enqueued the last job for the current frame, the scheduler raises the priority of the application to high. This results in the scheduler attempting to schedule all remaining jobs for the application back-to-back. Once all jobs of the application have been completed, the priority of the application is reduced, permitting jobs of other applications to be executed.
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公开(公告)号：US20200250787A1
公开(公告)日：2020-08-06
申请号：US16263709
申请日：2019-01-31
Applicant: Advanced Micro Devices, Inc. , ATI Technologies ULC
Inventor： Jeffrey Gongxian Cheng , Ahmed M. Abdelkhalek , Yinan Jiang , Xingsheng Wan , Anthony Asaro , David Martinez Nieto
Abstract: Systems, apparatuses, and methods for scheduling jobs for multiple frame-based applications are disclosed. A computing system executes a plurality of frame-based applications for generating pixels for display. The applications convey signals to a scheduler to notify the scheduler of various events within a given frame being rendered. The scheduler adjusts the priorities of applications based on the signals received from the applications. The scheduler attempts to adjust priorities of applications and schedule jobs from these applications so as to minimize the perceived latency of each application. When an application has enqueued the last job for the current frame, the scheduler raises the priority of the application to high. This results in the scheduler attempting to schedule all remaining jobs for the application back-to-back. Once all jobs of the application have been completed, the priority of the application is reduced, permitting jobs of other applications to be executed.
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公开(公告)号：US12045106B2
公开(公告)日：2024-07-23
申请号：US17564139
申请日：2021-12-28
Applicant: ATI TECHNOLOGIES ULC
Inventor： Yinan Jiang
CPC classification number: G06F1/24 , G06F9/45558 , G06F11/1484 , G06F2009/45575 , G06F2201/815
Abstract: A virtual function (VF) of a virtual machine is enabled to directly reset a processing portion of a processing unit. The VF initiates the reset of the processing portion directly and a host driver associated with the processing unit is bypassed during the reset process. By allowing for a direct reset of the processing portion, a processing system reduces the overhead associated with the reset process, enhances system security, and improves overall VM and hardware isolation at the processing system.
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公开(公告)号：US10509666B2
公开(公告)日：2019-12-17
申请号：US15637810
申请日：2017-06-29
Applicant: ATI Technologies ULC
Inventor： Anthony Asaro , Yinan Jiang , Kelly Donald Clark Zytaruk
Abstract: A register protection mechanism for a virtualized accelerated processing device (“APD”) is disclosed. The mechanism protects registers of the accelerated processing device designated as physical-function-or-virtual-function registers (“PF-or-VF* registers”), which are single architectural instance registers that are shared among different functions that share the APD in a virtualization scheme whereby each function can maintain a different value in these registers. The protection mechanism for these registers comprises comparing the function associated with the memory address specified by a particular register access request to the “currently active” function for the APD and disallowing the register access request if a match does not occur.
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Patent Agency Ranking
公开(公告)号：US20140380028A1
公开(公告)日：2014-12-25
申请号：US13923513
申请日：2013-06-21
Applicant: ATI Technologies ULC
Inventor： Gongxian Jeffrey CHENG , Anthony Asaro , Yinan Jiang
CPC classification number: G06F9/45558 , G06F1/24 , G06F9/45533 , G06F11/1441 , G06F2009/4557 , G06F2009/45575 , G06F2009/45591
Abstract: In a hardware-based virtualization system, a hypervisor switches out of a first function into a second function. The first function is one of a physical function and a virtual function and the second function is one of a physical function and a virtual function. During the switching a malfunction of the first function is detected. The first function is reset without resetting the second function. The switching, detecting, and resetting operations are performed by a hypervisor of the hardware-based virtualization system. Embodiments further include a communication mechanism for the hypervisor to notify a driver of the function that was reset to enable the driver to restore the function without delay.
Abstract translation: 在基于硬件的虚拟化系统中，管理程序将第一个功能切换到第二个功能。 第一个功能是物理功能和虚拟功能之一，第二个功能是物理功能和虚拟功能之一。 在切换期间，检测到第一功能的故障。 第一个功能在不重置第二个功能的情况下被复位。 切换，检测和重置操作由基于硬件的虚拟化系统的管理程序执行。 实施例还包括用于管理程序的通信机制，以通知驾驶员已经重置的功能，以使得驾驶员能够无延迟地恢复功能。
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17.发明授权公开(公告)号：US12265510B1
公开(公告)日：2025-04-01
申请号：US18478895
申请日：2023-09-29
Applicant: ATI Technologies ULC
Inventor： Yinan Jiang , Dmytro Chenchykov , Shaoyun Liu , Vignesh Chander
Abstract: A computer-implemented method for ensuring processing unit hardware state integrity in live migration can include participating as a source, by a processing unit, in a live migration procedure by injecting, into a live migration data package containing a state of the processing unit, a signature verifying the state. The method can additionally include participating as a target, by the processing unit, in an additional live migration procedure migrating an additional live migration data package containing an additional state of an additional processing unit by performing an integrity check based on an additional signature, in the additional live migration data package, verifying the additional state. Various other methods, systems, and computer-readable media are also disclosed.
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公开(公告)号：US20240184623A1
公开(公告)日：2024-06-06
申请号：US18072818
申请日：2022-12-01
Applicant: ATI TECHNOLOGIES ULC
Inventor： Ahmed M. Abdelkhalek , Rutao Zhang , Bokun Zhang , Min Zhang , Yinan Jiang , Jeffrey G. Cheng
CPC classification number: G06F9/4881 , G06F9/54
Abstract: Systems and methods are provided related to a scheduler to receive a job request from a virtual function associated with a tenant for execution by at least one processing unit. The scheduler validates the job request in accordance with one or more defined restrictions associated with the tenant and, responsive to successful validation, provides the job request for execution by the processing unit via one or more physical functions associated with the processing unit. In certain embodiments, multi-level enforcement of the defined restrictions are provided via user-mode and kernel-mode drivers associated with the virtual function that are also enabled to validate job requests based on the defined restrictions.
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公开(公告)号：US11256530B2
公开(公告)日：2022-02-22
申请号：US16220779
申请日：2018-12-14
Applicant: ATI TECHNOLOGIES ULC
Inventor： Yinan Jiang , Jeffrey G. Cheng
IPC: G06F9/455 , G06F12/1009 , G06T1/20
Abstract: A processing system identifies a subset of pages of memory allocated to a source guest virtual machine (VM) running at a first graphics processing unit (GPU) that were modified by the source guest VM and transferring only the subset to a destination guest VM running at a second GPU when performing a live migration from the source guest VM to the destination guest VM. The first GPU maintains a page table of system memory addresses or frame buffer addresses allocated to and accessed by the source guest VM during a session, including an indication of whether the data was modified. Based on the page table information, the processing system identifies and transfers only the modified pages from the source guest VM to the destination guest VM, thereby reducing the time and bandwidth used for migration.
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公开(公告)号：US10459751B2
公开(公告)日：2019-10-29
申请号：US15639971
申请日：2017-06-30
Applicant: ATI Technologies ULC
Inventor： Yinan Jiang , Ahmed M. Abdelkhalek , Guopei Qiao , Andy Sung , Haibo Liu , Dezhi Ming , Zhidong Xu
Abstract: A technique for varying firmware for different virtual functions in a virtualized device is provided. The virtualized device includes a hardware accelerator and a microcontroller that executes firmware. The virtualized device is virtualized in that the virtualized device performs work for different virtual functions (with different virtual functions associated with different virtual machines), each function getting a “time-slice” during which work is performed for that function. To vary the firmware, each time the virtualized device switches from performing work for a current virtual function to work for a subsequent virtual function, one or more microcontrollers of the virtualized device examines memory storing addresses for firmware for the subsequent virtual function and begins executing the firmware for that subsequent virtual function. The addresses for the firmware are provided by a corresponding virtual machine at configuration time.
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