Abstract:
An image sensor includes an imaging area and one or more flicker detection regions. The imaging area includes pixels that capture one or more images. Each flicker detection region includes pixels that are sampled multiple times while an image is being captured. The samples can be analyzed to detect flicker in the scene being imaged.
Abstract:
An image sensor and a method of operating an image sensor to achieve a substantially uniform power signature. An array of pixels may be scanned using analog sensing circuitry to obtain an analog sensor output. The scanning is performed over a first time interval. The analog sensor output is converted to a digital data output using digital logic circuitry. The converting occurs over a second time interval that is subsequent to the first time interval and may be substantially the same duration as the first time interval. While the array of pixels are being scanned, the digital logic circuitry is operated over the first time interval and substantially coincides with the scanning of the array of pixels.
Abstract:
A camera may one or more lenses and an image sensor having an array of light-gathering pixels. The pixels may generate image signals based on light passing through the lenses. The camera may include at least one pixel output settling assist circuit. The pixel output settling assist circuit may be electrically coupled to an output signal line of at least one of the pixels. The pixel output settling assist circuit may include a pixel output voltage change detection circuit and a bias current adjustment circuit. During read-out of the image signals of the at least one pixel, the pixel output voltage change detection circuit may detect a change of a voltage at the output of the pixel. The bias current adjustment circuit may generate and adjust a current injected to the output based on the detected change of the voltage at the output.
Abstract:
Disclosed herein are electronic devices and image sensors containing pixel arrays, layouts of electrical signal lines for such pixel arrays, and methods of pixel read out operations, including row read operations, for such pixel arrays. Layouts are disclosed that have reduced sets of shielding or ground lines. In some layouts, shielding ground lines are used only between pairs of adjacent pixel output signal lines (OSLs). Also disclosed is a method of using one OSL within a pair of adjacent pixel OSLs to provide settling assist of the pixel output signal on the other OSL of the adjacent pair of OSLs.
Abstract:
A sequence of digital images are produced using an imaging sensor circuit, wherein each of the digital images was a result of light capture by the imaging sensor circuit during a respective pixel integration phase followed by analog to digital conversion during a respective readout phase. A camera actuator is driven while producing the sequence of images, wherein during a part of every respective readout phase for the sequence of digital images the actuator is driven using a linear drive circuit, and wherein during a part of every respective pixel integration phase the actuator is driven using a switch mode drive circuit. Other embodiments are also described and claimed.
Abstract:
An image sensor includes pixels that accumulate charge during a first integration period and pixels that accumulate charge during shorter second integration periods when an image is captured. The pixels having the shorter second integration period accumulate charge at two or more different times during the first integration period. Charge is read out of the pixels associated with the first integration period at the end of the first integration period, while charge is read out of the pixels having the second integration period at the end of each second integration period.
Abstract:
Pixel binning is performed by summing charge from some pixels positioned diagonally in a pixel array. Pixel signals output from pixels positioned diagonally in the pixel array may be combined on the output lines. A signal representing summed charge produces a binned 2×1 cluster. A signal representing combined voltage signals produces a binned 2×1 cluster. A signal representing summed charge and a signal representing combined pixel signals can be combined digitally to produce a binned 2×2 pixel. Orthogonal binning may be performed on other pixels in the pixel array by summing charge on respective common sense regions and then then combining the voltage signals that represent the summed charge on respective output lines.
Abstract:
A method of operating an image sensor. Charge accumulated in a photodiode during a first sub-exposure may be selectively stored in a storage node responsive to a first control signal. Charge accumulated in the photodiode during a first reset period may be selectively discarded responsive to a second control signal. Charge accumulated in the photodiode during a second sub-exposure may be selectively stored responsive to the first control signal. Charge stored in the storage node from the first and second sub-exposures may be transferred to a floating diffusion node responsive to a third control signal.
Abstract:
Disclosed herein are electronic devices and image sensors containing pixel arrays, layouts of electrical signal lines for such pixel arrays, and methods of pixel read out operations, including row read operations, for such pixel arrays. Layouts are disclosed that have reduced sets of shielding or ground lines. In some layouts, shielding ground lines are used only between pairs of adjacent pixel output signal lines (OSLs). Also disclosed is a method of using one OSL within a pair of adjacent pixel OSLs to provide settling assist of the pixel output signal on the other OSL of the adjacent pair of OSLs.
Abstract:
One or more cross-wafer capacitors are formed in an electronic component, circuit, or device that includes stacked wafers. One example of such a device is a stacked image sensor. The image sensor can include two or more wafers, with two wafers that are bonded to each other each including a conductive segment adjacent to, proximate, or abutting a bonding surface of the respective wafer. The conductive segments are positioned relative to each other such that each conductive element forms a plate of a capacitor. A cross-wafer capacitor is formed when the two wafers are attached to each other.