Abstract:
An audio amplifier has a first H bridge and a second H bridge, to drive a speaker as a load. The second H bridge drives the speaker through resistors for increased output impedance. Control logic operates the first H bridge as a class D amplifier for larger amplitudes of audio signal, and operates the second H bridge as a class D amplifier for smaller amplitudes of audio signal. Other aspects are also described and claimed.
Abstract:
An audio system bus has a bus data line and a bus clock line. Audio producers are coupled to the bus to form a time-division multiplexed multi drop bus interface arrangement having protocol slots 0, 1, . . . N where N is an integer greater than two. A bus device is coupled to the bus that produces a) a frame marker on the bus data line in slot 0, and b) a data bit on the bus data line in slot 1. The audio producers are to produce their respective audio data bits in their assigned slots other than slots 0 and 1. Other embodiments are also described and claimed.
Abstract:
A charge pump circuit having first and second input nodes to be coupled to a first power source, and top and bottom output nodes and an intermediate node. The charge pump circuit produces i) a voltage at the top output node that is higher than a voltage of the intermediate node, and ii) a voltage at the bottom output node that is lower than the voltage of the intermediate node. A bias voltage source has i) an input that is to be coupled to a second power source and ii) an output that produces an output voltage, which is a predetermined proportion of an input voltage at the input and that follows the input voltage downward and upward as the input voltage sags and recovers, respectively. The output of the bias voltage source is directly connected to the intermediate node of the output stage. Other embodiments are also described.
Abstract:
A method for audio signal processing, where an audio amplifier drives a load through a connector, using 1) an input audio signal, and 2) a signal from a return pin of the connector. Output headroom of the audio amplifier is automatically detected, while the amplifier is driving the load. A variable resistor circuit that is coupled to provide variable resistance between the return pin of the connector and a ground plane, is automatically adjusted, in response to the detected output headroom of the amplifier. Other embodiments are also described and claimed.
Abstract:
A method for operating an audio system having multiple Class D audio amplifiers is described. An external oscillatory signal is coupled to the amplifiers, such that the switching frequencies of both of the amplifiers align with (e.g., are directly set to) a frequency of the external signal. An input level associated with an audio signal that is being amplified is detected, and the detected input level is compared to a threshold. When the comparison indicates that the input level is below a lower threshold, the frequency of the external oscillatory signal is raised, and when the comparison indicates that the input level is above an upper threshold, the frequency of the external oscillatory signal is lowered. Other embodiments are also described and claimed.
Abstract:
A programmed data processor obtains a number of input voltage measurements for a number of speaker drivers, respectively, and a sensed shared current being a measure of current in a single power supply rail that is feeding power to each of a number of audio amplifiers while the audio amplifiers are driving the speaker drivers in accordance with a number of audio channel test signals, respectively. The programmed data processor computes an estimate of electrical input impedance of each of the speaker drivers using the input voltage measurement for the speaker driver and using the sensed shared current. Other embodiments are also described and claimed.
Abstract:
A group of transistors is configured to drive a bus at time slots, to express data on the bus. The group of transistors dissipates an amount of electrical energy when driving the bus to a logic level opposite to a logic level present on the bus in an immediate preceding time slot. The group of transistors is arranged to dump another amount of electrical energy. Dumping of the other amount of electrical energy is responsive to driving the bus to a logic level that is the same as present on the bus in an immediate preceding time slot. The dumped amount of electrical energy is equivalent to the amount of energy dissipated by the transistors when transitioning the bus to a different logic level. Other aspects are also described.
Abstract:
A group of transistors is configured to drive a bus at time slots, to express data on the bus. The group of transistors dissipates an amount of electrical energy when driving the bus to a logic level opposite to a logic level present on the bus in an immediate preceding time slot. The group of transistors is arranged to dump another amount of electrical energy. Dumping of the other amount of electrical energy is responsive to driving the bus to a logic level that is the same as present on the bus in an immediate preceding time slot. The dumped amount of electrical energy is equivalent to the amount of energy dissipated by the transistors when transitioning the bus to a different logic level. Other aspects are also described.
Abstract:
A group of transistors is configured to drive a bus at time slots, to express data on the bus. The group of transistors dissipates an amount of electrical energy when driving the bus to a logic level opposite to a logic level present on the bus in an immediate preceding time slot. The group of transistors is arranged to dump another amount of electrical energy. Dumping of the other amount of electrical energy is responsive to driving the bus to a logic level that is the same as present on the bus in an immediate preceding time slot. The dumped amount of electrical energy is equivalent to the amount of energy dissipated by the transistors when transitioning the bus to a different logic level. Other aspects are also described.
Abstract:
A power converter provides a first output voltage and a second output voltage in accordance with a control input, wherein the first output voltage is higher than the second output voltage. A switch that is series coupled between i) an energy reservoir node and ii) a power supply node or a power return node. A charge maintenance circuit is coupled to the energy reservoir node, and when the switch is closed can maintain a selected amount of charge in or a selected voltage across an energy reservoir element that may be coupled to the energy reservoir node. Other aspects are also described and claimed.