公开(公告)号：US20240394199A1

公开(公告)日：2024-11-28

申请号：US18744855

申请日：2024-06-17

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： SOORAJ PUTHOOR ,  MUHAMMAD AMBER HASSAAN ,  ASHWIN AJI ,  MICHAEL L. CHU ,  NUWAN JAYASENA

IPC: G06F12/1072 ,  G06F12/02 ,  G06F12/1009 ,  G06F12/1045 ,  G06F13/16

Abstract: Process isolation for a PIM device includes: receiving, from a process, a call to allocate a virtual address space where the process stores a PIM configuration context; allocating the virtual address space including mapping a physical address space including PIM device configuration registers to the virtual address space only if the physical address space is not mapped to another process's virtual address space; and programming the PIM device configuration space according to the configuration context. When a PIM command is executed, a translation mechanism determines whether there is a valid mapping of a virtual address of the PIM command to a physical address of a PIM resource, such as a LIS entry. If a valid mapping exists, the translation is completed and the resource is accessed, but if there is not a valid mapping, the translation fails and the process is blocked from accessing the PIM resource.

公开(公告)号：US20240211256A1

公开(公告)日：2024-06-27

申请号：US18601006

申请日：2024-03-11

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： SOORAJ PUTHOOR ,  MUHAMMAD AMBER HASSAAN ,  ASHWIN AJI ,  MICHAEL L. CHU ,  NUWAN JAYASENA

IPC: G06F9/30 ,  G06F7/575 ,  G06F9/38

CPC classification number: G06F9/3004 ,  G06F7/575 ,  G06F9/3001 ,  G06F9/3856

Abstract: An apparatus that manages multi-process execution in a processing-in-memory (“PIM”) device includes a gatekeeper configured to: receive an identification of one or more registered PIM processes; receive, from a process, a memory request that includes a PIM command; if the requesting process is a registered PIM process and another registered PIM process is active on the PIM device, perform a context switch of PIM state between the registered PIM processes; and issue the PIM command of the requesting process to the PIM device.

公开(公告)号：US20230195459A1

公开(公告)日：2023-06-22

申请号：US17556291

申请日：2021-12-20

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： SOORAJ PUTHOOR ,  MUHAMMAD AMBER HASSAAN ,  ASHWIN AJI ,  MICHAEL L. CHU ,  NUWAN JAYASENA

IPC: G06F9/30 ,  G06F9/38 ,  G06F7/575

CPC classification number: G06F9/3004 ,  G06F9/3001 ,  G06F9/3855 ,  G06F7/575

Abstract: An apparatus that manages multi-process execution in a processing-in-memory (“PIM”) device includes a gatekeeper configured to: receive an identification of one or more registered PIM processes; receive, from a process, a memory request that includes a PIM command; if the requesting process is a registered PIM process and another registered PIM process is active on the PIM device, perform a context switch of PIM state between the registered PIM processes; and issue the PIM command of the requesting process to the PIM device.

公开(公告)号：US20230195375A1

公开(公告)日：2023-06-22

申请号：US17556503

申请日：2021-12-20

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： SOORAJ PUTHOOR ,  MUHAMMAD AMBER HASSAAN ,  ASHWIN AJI ,  MICHAEL L. CHU ,  NUWAN JAYASENA

IPC: G06F3/06 ,  G06F7/575

CPC classification number: G06F3/0659 ,  G06F3/0631 ,  G06F3/0656 ,  G06F3/0622 ,  G06F3/0679 ,  G06F7/575

Abstract: Process isolation for a PIM device through exclusive locking includes receiving, from a process, a call requesting ownership of a PIM device. The request includes one or more PIM configuration parameters. The exclusive locking technique also includes granting the process ownership of the PIM device responsive to determining that ownership is available. The PIM device is configured according to the PIM configuration parameters.

公开(公告)号：US20220413849A1

公开(公告)日：2022-12-29

申请号：US17360949

申请日：2021-06-28

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： NUWAN JAYASENA

IPC: G06F9/30

Abstract: Providing atomicity for complex operations using near-memory computing is disclosed. In an implementation, a complex atomic operation is decomposed into a set of sequential operations that is stored in a near-memory instruction store. A memory controller receives a request from a host execution engine to issue the complex atomic operation and initiates execution of the stored set of sequential operations on a near-memory compute unit. The complex atomic operation may be a user-defined complex atomic operation.

公开(公告)号：US20220206901A1

公开(公告)日：2022-06-30

申请号：US17136549

申请日：2020-12-29

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： SHRIKANTH GANAPATHY ,  ROSS V. LA FETRA ,  JOHN KALAMATIANOS ,  SUDHANVA GURUMURTHI ,  SHAIZEEN AGA ,  VILAS SRIDHARAN ,  MICHAEL IGNATOWSKI ,  NUWAN JAYASENA

IPC: G06F11/14 ,  G06F11/10

Abstract: Providing host-based error detection capabilities in a remote execution device is disclosed. A remote execution device performs a host-offloaded operation that modifies a block of data stored in memory. Metadata is generated locally for the modified of block of data such that the local metadata generation emulates host-based metadata generation. Stored metadata for the block of data is updated with the locally generated metadata for the modified portion of the block of data. When the host performs an integrity check on the modified block of data using the updated metadata, the host does not distinguish between metadata generated by the host and metadata generated in the remote execution device.

公开(公告)号：US20220100606A1

公开(公告)日：2022-03-31

申请号：US17033398

申请日：2020-09-25

Applicant: Advanced Micro Devices, Inc.

Inventor： SUDHANVA GURUMURTHI ,  VILAS SRIDHARAN ,  SHAIZEEN AGA ,  NUWAN JAYASENA ,  MICHAEL IGNATOWSKI ,  SHRIKANTH GANAPATHY ,  JOHN KALAMATIANOS

IPC: G06F11/10 ,  H04L9/32 ,  G06F21/60

Abstract: A memory module includes one or more programmable ECC engines that may be programed by a host processing element with a particular ECC implementation. As used herein, the term “ECC implementation” refers to ECC functionality for performing error detection and subsequent processing, for example using the results of the error detection to perform error correction and to encode corrupted data that cannot be corrected, etc. The approach allows an SoC designer or company to program and reprogram ECC engines in memory modules in a secure manner without having to disclose the particular ECC implementations used by the ECC engines to memory vendors or third parties.

公开(公告)号：US20210303355A1

公开(公告)日：2021-09-30

申请号：US16828190

申请日：2020-03-24

Applicant: ADVANCED MICRO DEVICES, INC.

Inventor： ANIRBAN NAG ,  NUWAN JAYASENA ,  SHAIZEEN AGA

IPC: G06F9/50 ,  G06F9/54 ,  G06F12/0882 ,  G06F12/02 ,  G06F12/1027

Abstract: Memory allocation for processing-in-memory operations, including: receiving, by an allocation module, a memory allocation request indicating a plurality of data structure operands for a processing-in-memory operation; determining a memory allocation pattern for the plurality of data structure operands, wherein the memory allocation pattern interleaves a plurality of component pages of a memory page across the plurality of data structure operands; and allocating the memory page based on the determined memory allocation pattern.