公开(公告)号：US11699654B2

公开(公告)日：2023-07-11

申请号：US17243456

申请日：2021-04-28

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Shao-An Chen ,  Chih-Yi Huang ,  Ping Cing Shen

IPC: H01L23/522 ,  H01L23/31 ,  H01L23/00 ,  H01L21/48 ,  H01L21/66

CPC classification number: H01L23/5226 ,  H01L21/486 ,  H01L22/12 ,  H01L23/31 ,  H01L24/14 ,  H01L2224/023 ,  H01L2224/0401

Abstract: An electronic device package includes an encapsulated electronic component, a redistribution layer (RDL) and a conductive via. The RDL is disposed above the encapsulated electronic component. The RDL includes a circuit layer comprising a conductive pad including a pad portion having a curved edge and a center of curvature, and an extension portion protruding from the pad portion and having a curved edge and a center of curvature. The circuit layer further includes a dielectric layer above the RDL. The conductive via is disposed in the dielectric layer and connected to the conductive pad of the RDL. A center of the conductive via is closer to the center of curvature of the edge of the extension portion than to the center of curvature of the edge of the pad portion.

公开(公告)号：US10332849B2

公开(公告)日：2019-06-25

申请号：US16121467

申请日：2018-09-04

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chang-Lin Yeh ,  Jen-Chieh Kao ,  Chih-Yi Huang ,  Fu-Chen Chu

IPC: H01L43/02 ,  H01L23/66 ,  H01L23/498 ,  H01L23/552 ,  H01L25/065 ,  H01L25/16

Abstract: A semiconductor package device includes: (1) a substrate having a first surface; (2) a permeable element including a first portion disposed on the first surface of the substrate, a second portion protruding from the first portion, and a third portion disposed on the second portion and contacting the second portion of the permeable element; (3) a first electrical element disposed on the substrate and surrounded by the second portion of the permeable element; and (4) a coil disposed on the substrate and surrounding the second portion of the permeable element.

公开(公告)号：US09564393B1

公开(公告)日：2017-02-07

申请号：US14857931

申请日：2015-09-18

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chih-Yi Huang ,  Kuo-Hua Chen ,  Chi-Tsung Chiu

IPC: H01L23/00 ,  H01L23/498 ,  H01L21/52 ,  H01L21/768

CPC classification number: H01L23/49844 ,  H01L21/486 ,  H01L21/52 ,  H01L21/76802 ,  H01L21/76877 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/06181 ,  H01L2224/24226 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/8203 ,  H01L2224/92244 ,  H01L2924/3025 ,  H01L2924/3511

Abstract: A semiconductor device package includes a substrate and a semiconductor device disposed on a surface of the substrate. The semiconductor device includes a first contact pad and a second contact pad disposed on an upper surface of the semiconductor device. The semiconductor device package further includes a conductive bar disposed on the first contact pad, and a conductive pillar disposed on the second contact pad. A method of making a semiconductor device package includes (a) providing a substrate; (b) mounting a semiconductor device on the substrate, wherein the semiconductor device comprises a first contact pad and a second contact pad on an upper surface of the semiconductor device; (c) forming a dielectric layer on the substrate to cover the semiconductor device; (d) exposing the second contact pad by forming a hole in the dielectric layer; and (e) applying a conductive material over the dielectric layer and filling the hole.

Abstract translation: 半导体器件封装包括衬底和设置在衬底的表面上的半导体器件。 半导体器件包括设置在半导体器件的上表面上的第一接触焊盘和第二接触焊盘。 半导体器件封装还包括设置在第一接触焊盘上的导电棒和设置在第二接触焊盘上的导电柱。 制造半导体器件封装的方法包括（a）提供衬底; （b）将半导体器件安装在所述衬底上，其中所述半导体器件包括在所述半导体器件的上表面上的第一接触焊盘和第二接触焊盘; （c）在所述基板上形成电介质层以覆盖所述半导体器件; （d）通过在电介质层中形成一个孔来暴露第二接触垫; 和（e）将导电材料涂覆在电介质层上并填充该孔。