Abstract:
A circuit for detecting noise peaks on the power supply of an electronic circuit, including at least a first transistor having its control terminal connected to a terminal of application of a first potential of a supply voltage of the circuit and having a first conduction terminal connected to a terminal of application of a second potential via at least one first resistive element, the second conduction terminal of the first transistor providing the result of the detection.
Abstract:
A method of determining, by a first device capable of transmitting a two-state signal over a single-wire connection to a second device, the binary state of data transmitted by the second device over said connection, the state being determined according to the slope of a rising edge of the two-state signal.
Abstract:
An integrated cell for extracting a binary value based on a value difference between two resistors values, including connection circuitry for a binary reading of the sign of the difference between the resistors, and connection circuitry for a modification of the value of one of the resistors to make the sign of the difference invariable.
Abstract:
A method and a circuit for scrambling the current signature of a load including at least one integrated circuit executing digital processings, including the step of, at least on the load ground side, combining a current absorbed by a first linear regulator with a current absorbed by at least one capacitive switched-mode circuit with one or several switched capacitances.
Abstract:
The invention relates to a memory cell with a binary value consisting of two parallel branches. Each of said branches comprises: at least one polycrystalline silicon programming resistor (Rp1, Rp2), which is connected between a first supply terminal (1) and a point or terminal for the differential reading (4, 6) of the memory cell state; and at least one first switch (MNP1, MNP2) which, during programming, connects one of said read terminals to a second supply terminal (2).
Abstract:
A circuit for controlling the random character of a bit flow, including an input shift register receiving the bit flow and having its outputs exploited in parallel, at least one element for comparing at least a partial content of the input register with predetermined patterns, a plurality of counters in a number at most equal to the number of predetermined patterns, and an element for detecting the exceeding of at least one threshold by one of the counters, the result of this detection conditioning the state of a word or bit indicative of the random or non-random character of the bit flow.
Abstract:
A random signal generator uses a folded MOS transistor, whose drain-source current includes a random component, as an electronic noise source. The random signal generator generates a random binary signal from the random component. The invention may be applied, in particular, to smart cards.
Abstract:
A random signal generator uses a folded MOS transistor, whose drain-source current includes a random component, as an electronic noise source. The random signal generator generates a random binary signal from the random component. The invention may be applied, in particular, to smart cards.
Abstract:
A method and a device of transmission/reception by inductive coupling including circuitry for generating an AQ.C. signal intended to drive an oscillating circuit and circuitry intended to modulate the impedance of the oscillating circuit when data is to be transmitted, the oscillating circuit including an inductive element forming an antenna in parallel with a first capacitive element; and at least one second capacitive element in series with a switch, all in parallel with the first capacitive element and the antenna, the modulating circuitry being connected between the terminals of the antenna and the circuitry for generating the AQ.C. signal being connected to the junction point of the second capacitive element and of the switch.
Abstract:
An integrated cell for extracting a binary value based on a value difference between two resistors values, including connection circuitry for a binary reading of the sign of the difference between the resistors, and connection circuitry for a modification of the value of one of the resistors to make the sign of the difference invariable.