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公开(公告)号：US11321134B2
公开(公告)日：2022-05-03
申请号：US16795814
申请日：2020-02-20
Applicant: Apple Inc.
Inventor： Kutty Banerjee , Michael Imbrogno
Abstract: In general, embodiments are disclosed herein for tracking and allocating graphics hardware resources. In one embodiment, a software and/or firmware process constructs a cross-application command queue utilization table based on one or more specified command queue quality of service (QoS) settings, in order to track the target and current utilization rates of each command queue on the graphics hardware over a given frame and to load work onto the graphics hardware in accordance with the utilization table. Based on the constructed utilization table for a given frame, any command queues that have exceed their respective target utilization value may be moved to an “inactive” status for the duration of the current frame. For any command queues that remain in an “active” status for the current frame, work from those command queues may be loaded on to slots of the appropriate data masters of the graphics hardware in any desired order.
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公开(公告)号：US20200380744A1
公开(公告)日：2020-12-03
申请号：US16428374
申请日：2019-05-31
Applicant: Apple Inc.
Inventor： Michal Valient , Michael Imbrogno , Rohan Sehgal , Kyle C. Piddington , Matthijs L. van der Meide
Abstract: One disclosed embodiment includes a method of graphics processing. The method includes receiving a first function, wherein the first function indicates a desired sampling rate for image content, wherein the desired sampling rate differs in a first location along a first axial direction and a second location along the first axial direction, and wherein the image content is divided into a plurality of tiles, determining a first rasterization rate for each tile of the plurality of tiles based, at least in part, on the desired sampling rate indicated by the first function corresponding to each respective tile, receiving one or more primitives associated with content for display, rasterizing at least a portion of a primitive associated with a respective tile based, at least in part, on the determined first rasterization rate for the respective tile, and displaying an image based on the rasterized portion of the primitive.
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公开(公告)号：US20200380734A1
公开(公告)日：2020-12-03
申请号：US16428403
申请日：2019-05-31
Applicant: Apple Inc.
Inventor： Michal Valient , Michael Imbrogno , Karol E. Czaradzki , Narayanan Swaminathan
Abstract: This disclosure includes example embodiments of graphics processor memory management systems that support the use of graphical textures that are not fully bound or “backed” in memory throughout their entire lifespans. Such graphical textures are referred to herein as “sparse textures.” According to some embodiments, sparse textures may be split into fixed-dimension pages in memory wherein, during execution, a user may indicate a desire to map certain pages to physical memory locations and populate such pages with the underlying data. In other embodiments, statistical information obtained from the graphics processor is used to aid in the determination of whether or not a given texture (or portion of a texture) needs physical memory backing. In yet other embodiments, the graphics processor may also enforce ordering guarantees, e.g., in instances when there are fewer pages in memory available than there is a need for backing of at a given moment in time.
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公开(公告)号：US10825129B2
公开(公告)日：2020-11-03
申请号：US15467268
申请日：2017-03-23
Applicant: Apple Inc.
Inventor： Bartosz Ciechanowski , Michael Imbrogno , Gokhan Avkarogullari , Nathaniel C. Begeman , Sean M. Gies , Michael J. Swift
Abstract: One disclosed embodiment is directed to graphics processing method for displaying a user interface. The method includes executing a plurality of graphic processing operation in a single rendering pass. The rendering pass includes several render targets. At least one of the render targets is designated as a memory-less render target. The memory-less render target is used to store intermediate data. The intermediate data is combined with the outcome of at least one other graphics processing operation to generate a combined result. The combined result is stored in the frame buffer memory for display.
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公开(公告)号：US20170358055A1
公开(公告)日：2017-12-14
申请号：US15587063
申请日：2017-05-04
Applicant: Apple Inc.
Inventor： Michael J. Swift , Michael Imbrogno , Gokhan Avkarogullari
CPC classification number: G06T1/60 , G06T1/20 , G06T15/005
Abstract: One disclosed embodiment includes memory allocation methods for use by a graphics processing unit in rendering graphics data for display. The method includes receiving a buffer attachment associated with a first rendering pass. The hardware prerequisites for operation of the first rendering pass is determined. The method also includes receiving an indication to not allocate system memory for the received buffer attachment. Thereafter, it may be determined whether the received buffer attachment will be loaded from or stored to by the subsequent rendering passes. If it is determined that the buffer attachment will be accessed by the subsequent rendering passes, an error message may be generated indicating that system memory must be allocated. If it is determined that the buffer attachment will not be accessed by the subsequent rendering passes, the buffer attachment is rendered without allocating system memory.
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Patent Agency Ranking
公开(公告)号：US11593175B2
公开(公告)日：2023-02-28
申请号：US17661624
申请日：2022-05-02
Applicant: Apple Inc.
Inventor： Kutty Banerjee , Michael Imbrogno
Abstract: In general, embodiments are disclosed herein for tracking and allocating graphics hardware resources. In one embodiment, a software and/or firmware process constructs a cross-application command queue utilization table based on one or more specified command queue quality of service (QoS) settings, in order to track the target and current utilization rates of each command queue on the graphics hardware over a given frame and to load work onto the graphics hardware in accordance with the utilization table. Based on the constructed utilization table for a given frame, any command queues that have exceed their respective target utilization value may be moved to an “inactive” status for the duration of the current frame. For any command queues that remain in an “active” status for the current frame, work from those command queues may be loaded on to slots of the appropriate data masters of the graphics hardware in any desired order.
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公开(公告)号：US11120591B2
公开(公告)日：2021-09-14
申请号：US16428374
申请日：2019-05-31
Applicant: Apple Inc.
Inventor： Michal Valient , Michael Imbrogno , Rohan Sehgal , Kyle C. Piddington , Matthijs L. van der Meide
Abstract: One disclosed embodiment includes a method of graphics processing. The method includes receiving a first function, wherein the first function indicates a desired sampling rate for image content, wherein the desired sampling rate differs in a first location along a first axial direction and a second location along the first axial direction, and wherein the image content is divided into a plurality of tiles, determining a first rasterization rate for each tile of the plurality of tiles based, at least in part, on the desired sampling rate indicated by the first function corresponding to each respective tile, receiving one or more primitives associated with content for display, rasterizing at least a portion of a primitive associated with a respective tile based, at least in part, on the determined first rasterization rate for the respective tile, and displaying an image based on the rasterized portion of the primitive.
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公开(公告)号：US20210096921A1
公开(公告)日：2021-04-01
申请号：US16688487
申请日：2019-11-19
Applicant: Apple Inc.
Inventor： Kutty Banerjee , Michael Imbrogno
Abstract: A first command is fetched for execution on a GPU. Dependency information for the first command, which indicates a number of parent commands that the first command depends on, is determined. The first command is inserted into an execution graph based on the dependency information. The execution graph defines an order of execution for plural commands including the first command. The number of parent commands are configured to be executed on the GPU before executing the first command. A wait count for the first command, which indicates the number of parent commands of the first command, is determined based on the execution graph. The first command is inserted into cache memory in response to determining that the wait count for the first command is zero or that each of the number of parent commands the first command depends on has already been inserted into the cache memory.
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公开(公告)号：US10930047B2
公开(公告)日：2021-02-23
申请号：US16707455
申请日：2019-12-09
Applicant: Apple Inc.
Inventor： Terence M. Potter , Richard W. Schreyer , James J. Ding , Alexander K. Kan , Michael Imbrogno
Abstract: Techniques are disclosed relating to synchronizing access to pixel resources. Examples of pixel resources include color attachments, a stencil buffer, and a depth buffer. In some embodiments, hardware registers are used to track status of assigned pixel resources and pixel wait and pixel release instruction are used to synchronize access to the pixel resources. In some embodiments, other accesses to the pixel resources may occur out of program order. Relative to tracking and ordering pass groups, this weak ordering and explicit synchronization may improve performance and reduce power consumption. Disclosed techniques may also facilitate coordination between fragment rendering threads and auxiliary mid-render compute tasks.
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公开(公告)号：US20200379815A1
公开(公告)日：2020-12-03
申请号：US16795814
申请日：2020-02-20
Applicant: Apple Inc.
Inventor： Kutty Banerjee , Michael Imbrogno
Abstract: In general, embodiments are disclosed herein for tracking and allocating graphics hardware resources. In one embodiment, a software and/or firmware process constructs a cross-application command queue utilization table based on one or more specified command queue quality of service (QoS) settings, in order to track the target and current utilization rates of each command queue on the graphics hardware over a given frame and to load work onto the graphics hardware in accordance with the utilization table. Based on the constructed utilization table for a given frame, any command queues that have exceed their respective target utilization value may be moved to an “inactive” status for the duration of the current frame. For any command queues that remain in an “active” status for the current frame, work from those command queues may be loaded on to slots of the appropriate data masters of the graphics hardware in any desired order.
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