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公开(公告)号:US11221962B2
公开(公告)日:2022-01-11
申请号:US16874997
申请日:2020-05-15
Applicant: Apple Inc.
Inventor: Jeffry E. Gonion , Bernard Joseph Semeria , Michael J. Swift , Pradeep Kanapathipillai , David J. Williamson
IPC: G06F12/1009 , G06F12/14 , G06F12/0873 , G06F12/1072
Abstract: A system and method for efficiently transferring address mappings and data access permissions corresponding to the address mappings. A computing system includes at least one processor and memory for storing a page table. In response to receiving a memory access operation comprising a first address, the address translation unit is configured to identify a data access permission based on a permission index corresponding to the first address, and access data stored in a memory location of the memory identified by a second address in a manner defined by the retrieved data access permission. The address translation unit is configured to access a table to identify the data access permission, and is configured to determine the permission index and the second address based on the first address. A single permission index may correspond to different permissions for different entities within the system.
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2.
公开(公告)号:US20200104968A1
公开(公告)日:2020-04-02
申请号:US16202689
申请日:2018-11-28
Applicant: Apple Inc.
Inventor: Jason P. Jane , Michael J. Swift
Abstract: Systems, methods, and computer readable media to perform out-of-order command scheduling for a graphics processor are described. A graphics driver receives commands committed to a graphics processor for execution. The graphics driver queues a first command to a first graphics driver virtual channel that submits commands to the graphics processor for execution. The first command is associated with a first set of resources. The graphics driver determines whether a second set of resources associated with the second command depends on the first set of resources. The graphics driver queues the second command to the first graphics driver virtual channel based on a determination that the second set of resources depends on the first set of resources. The graphics driver queues the second command to a second virtual channel based on a determination that the second set of resources does not depend on the first set of resources.
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公开(公告)号:US10324844B2
公开(公告)日:2019-06-18
申请号:US15389047
申请日:2016-12-22
Applicant: Apple Inc.
Inventor: Anthony P. DeLaurier , Owen C. Anderson , Michael J. Swift , Aaftab A. Munshi , Terence M. Potter
IPC: G09G5/36 , G06F12/0815 , G06F12/0811 , G06F12/084 , G06T1/60
Abstract: Techniques are disclosed relating to memory consistency in a memory hierarchy with relaxed ordering. In some embodiments, an apparatus includes a first level cache that is shared by a plurality of shader processing elements and a second level cache that is shared by the shader processing elements and at least a texture processing unit. In some embodiments, the apparatus is configured to execute operations specified by graphics instructions that include (1) an attribute of the operation that specifies a type of memory consistency to be imposed for the operation and (2) scope information for the attribute that specifies whether the memory consistency specified by the attribute should be enforced at the first level cache or the second level cache. In some embodiments, the apparatus is configured to determine whether to sequence memory accesses at the first level cache and the second level cache based on the attribute and the scope.
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公开(公告)号:US10825129B2
公开(公告)日:2020-11-03
申请号:US15467268
申请日:2017-03-23
Applicant: Apple Inc.
Inventor: Bartosz Ciechanowski , Michael Imbrogno , Gokhan Avkarogullari , Nathaniel C. Begeman , Sean M. Gies , Michael J. Swift
Abstract: One disclosed embodiment is directed to graphics processing method for displaying a user interface. The method includes executing a plurality of graphic processing operation in a single rendering pass. The rendering pass includes several render targets. At least one of the render targets is designated as a memory-less render target. The memory-less render target is used to store intermediate data. The intermediate data is combined with the outcome of at least one other graphics processing operation to generate a combined result. The combined result is stored in the frame buffer memory for display.
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公开(公告)号:US20180181491A1
公开(公告)日:2018-06-28
申请号:US15389153
申请日:2016-12-22
Applicant: Apple Inc.
Inventor: Anthony P. DeLaurier , Luc R. Semeria , Gokhan Avkarogullari , David A. Gotwalt , Robert S. Hartog , Michael J. Swift
IPC: G06F12/0891 , G06F12/0895
CPC classification number: G06F12/0891 , G06F12/0811 , G06F12/084 , G06F12/0864 , G06F12/0895 , G06F12/1063 , G06F12/109 , G06F2212/1024 , G06F2212/302 , G06F2212/455 , G06F2212/60 , G06F2212/657
Abstract: Techniques are disclosed relating to flushing cache lines. In some embodiments, a graphics processing unit includes a cache and one or more storage elements configured to store a plurality of command buffers that include instructions executable to manipulate data stored in the cache. In some embodiments, ones of the cache lines in the cache are configured to store data to be operated on by instructions in the command buffers and a first tag portion that identifies a command buffer that has stored data in the cache line. In some embodiments, the graphics processing unit is configured to receive a request to flush cache lines that store data of a particular command buffer, and to flush ones of the cache lines having first tag portions indicating the particular command buffer as having data stored in the cache lines while maintaining data stored in other ones of the cache lines as valid.
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公开(公告)号:US20170358055A1
公开(公告)日:2017-12-14
申请号:US15587063
申请日:2017-05-04
Applicant: Apple Inc.
Inventor: Michael J. Swift , Michael Imbrogno , Gokhan Avkarogullari
CPC classification number: G06T1/60 , G06T1/20 , G06T15/005
Abstract: One disclosed embodiment includes memory allocation methods for use by a graphics processing unit in rendering graphics data for display. The method includes receiving a buffer attachment associated with a first rendering pass. The hardware prerequisites for operation of the first rendering pass is determined. The method also includes receiving an indication to not allocate system memory for the received buffer attachment. Thereafter, it may be determined whether the received buffer attachment will be loaded from or stored to by the subsequent rendering passes. If it is determined that the buffer attachment will be accessed by the subsequent rendering passes, an error message may be generated indicating that system memory must be allocated. If it is determined that the buffer attachment will not be accessed by the subsequent rendering passes, the buffer attachment is rendered without allocating system memory.
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公开(公告)号:US20210074053A1
公开(公告)日:2021-03-11
申请号:US16953021
申请日:2020-11-19
Applicant: Apple Inc.
Inventor: Anthony P. DeLaurier , Michael J. Swift , Michal Valient , Robert S. Hartog , Tyson J. Bergland , Gokhan Avkarogullari
IPC: G06T15/04 , G06T1/60 , G06F9/38 , G06T11/00 , G06F12/1009 , G06F9/50 , G06T15/00 , G06F12/0811
Abstract: Techniques are disclosed relating to memory allocation for graphics surfaces. In some embodiments, graphics processing circuitry is configured to access a graphics surface based on an address in a surface space assigned to the graphics surface. In some embodiments, first translation circuitry is configured to translate address information for the surface space to address information in the virtual space based on one or more of the translation entries. In some embodiments, the graphics processing circuitry is configured to provide an address for the access to the graphics surface based on translation by the first translation circuitry and second translation circuitry configured to translate the address in the virtual space to an address in a physical space of a memory configured to store the graphics surface. The disclosed techniques may allow sparse allocation of large graphics surfaces, in various embodiments.
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公开(公告)号:US20210064539A1
公开(公告)日:2021-03-04
申请号:US16874997
申请日:2020-05-15
Applicant: Apple Inc.
Inventor: Jeffry E. Gonion , Bernard Joseph Semeria , Michael J. Swift , Pradeep Kanapathipillai , David J. Williamson
IPC: G06F12/1009 , G06F12/1072 , G06F12/0873 , G06F12/14
Abstract: A system and method for efficiently transferring address mappings and data access permissions corresponding to the address mappings. A computing system includes at least one processor and memory for storing a page table. In response to receiving a memory access operation comprising a first address, the address translation unit is configured to identify a data access permission based on a permission index corresponding to the first address, and access data stored in a memory location of the memory identified by a second address in a manner defined by the retrieved data access permission. The address translation unit is configured to access a table to identify the data access permission, and is configured to determine the permission index and the second address based on the first address. A single permission index may correspond to different permissions for different entities within the system.
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9.
公开(公告)号:US10692169B2
公开(公告)日:2020-06-23
申请号:US16202689
申请日:2018-11-28
Applicant: Apple Inc.
Inventor: Jason P. Jane , Michael J. Swift
Abstract: Systems, methods, and computer readable media to perform out-of-order command scheduling for a graphics processor are described. A graphics driver receives commands committed to a graphics processor for execution. The graphics driver queues a first command to a first graphics driver virtual channel that submits commands to the graphics processor for execution. The first command is associated with a first set of resources. The graphics driver determines whether a second set of resources associated with the second command depends on the first set of resources. The graphics driver queues the second command to the first graphics driver virtual channel based on a determination that the second set of resources depends on the first set of resources. The graphics driver queues the second command to a second virtual channel based on a determination that the second set of resources does not depend on the first set of resources.
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公开(公告)号:US11257278B2
公开(公告)日:2022-02-22
申请号:US16953021
申请日:2020-11-19
Applicant: Apple Inc.
Inventor: Anthony P. DeLaurier , Michael J. Swift , Michal Valient , Robert S. Hartog , Tyson J. Bergland , Gokhan Avkarogullari
IPC: G06F12/1009 , G06T1/60 , G06T15/04 , G06F9/38 , G06T15/00 , G06F12/0811 , G06F9/50 , G06T11/00
Abstract: Techniques are disclosed relating to memory allocation for graphics surfaces. In some embodiments, graphics processing circuitry is configured to access a graphics surface based on an address in a surface space assigned to the graphics surface. In some embodiments, first translation circuitry is configured to translate address information for the surface space to address information in the virtual space based on one or more of the translation entries. In some embodiments, the graphics processing circuitry is configured to provide an address for the access to the graphics surface based on translation by the first translation circuitry and second translation circuitry configured to translate the address in the virtual space to an address in a physical space of a memory configured to store the graphics surface. The disclosed techniques may allow sparse allocation of large graphics surfaces, in various embodiments.
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