Abstract:
An apparatus and method for enumeration of processors during hot-plug of a compute node are described. The method includes the enumeration, in response to a hot-plug reset, of one or more processors. The enumeration is provided to a system architecture operating system in which a compute node is hot-plugged. Once enumeration is complete, the compute node is started in response to an operating system activation request. Accordingly, once device enumeration, as well as resource enumeration are complete, the one or more processors of the processor memory node are activated, such that the operating system may begin utilizing the processors of the hot-plugged compute node.
Abstract:
Error detection methods, systems and medium are provided. The error detection method may comprise processing error conditions associated with transactions in a manner that may enable error source identification. The system may comprise a plurality of nodes of components. The nodes may include storage elements to record an error condition indicative of whether a component provided an indication of detecting an error in response to processing the transaction.
Abstract:
A system that may optionally be partitioned into multiple domains is disclosed. Each domain is capable of independently powering on, executing a firmware program, and loading an operating system, including a legacy operating system, as well as running an application program that is distinct from programs running on another domain. Interrupts, including boot interrupts, reset handlers, and inter-chassis communications are initialized differently, depending on whether the system is to be partitioned or not. The cost of redundant hardware and/or firmware is substantially avoided, yet the system fully supports multiple domains.
Abstract:
A computing device maintains coherency while supporting addition and removal of memory caching agents without rebooting the computing device.
Abstract:
A method of electing a bootstrap processor from among a plurality of processor includes creating an atomic access shared location and electing one of said processors as the bootstrap processor.