公开(公告)号：US6047316A

公开(公告)日：2000-04-04

申请号：US989617

申请日：1997-12-12

申请人： Richard R. Barton ,  Arthur F. Cochcroft, Jr. ,  Edward A. McDonald ,  Robert J. Miller ,  Byron L. Reams ,  Roy M. Stevens ,  Billy K. Taylor

发明人： Richard R. Barton ,  Arthur F. Cochcroft, Jr. ,  Edward A. McDonald ,  Robert J. Miller ,  Byron L. Reams ,  Roy M. Stevens ,  Billy K. Taylor

IPC分类号： G06F9/46 ,  G06F12/00

CPC分类号： G06F9/52 ,  G06F12/0817

摘要： A multiprocessor computing apparatus that includes a mechanism for favoring at least one processor over another processor to achieve more equitable access to cached data. Logic for detecting when, for example, a remote and a local processor are attempting to access data from the cache of another local processor is disclosed. Logic that provides an advantage to the remote processor in a manner that achieves fairer access among the various processors is also disclosed.

摘要翻译： 一种多处理器计算装置，其包括用于在另一处理器上有利于至少一个处理器以实现对缓存数据的更公平访问的机制。 公开了用于检测例如远程和本地处理器何时尝试从另一本地处理器的高速缓存访​​问数据的逻辑。 还公开了以在各种处理器之间实现更公平的访问的方式为远程处理器提供优势的逻辑。

公开(公告)号：US5390078A

公开(公告)日：1995-02-14

申请号：US113464

申请日：1993-08-30

申请人： Billy K. Taylor

发明人： Billy K. Taylor

IPC分类号： H05K1/02 ,  H05K1/14 ,  H05K3/34 ,  H05K3/36 ,  H05K7/20

CPC分类号： H05K7/205 ,  H05K1/141 ,  H05K1/0206 ,  H05K2201/10303 ,  H05K2203/1572 ,  H05K3/3447 ,  H05K3/368

摘要： An apparatus and method for using a circuit board as a heat sink for another circuit board which effectively draws heat away from the other circuit board while the one circuit board is actively producing its own heat. Since the one circuit board is much larger than the other circuit board, the thermal mass of the one circuit board is great enough to absorb and spread the heat generated by both boards in the presence of forced air cooling. The method includes the steps of mounting a thermal conductivity layer on a predetermined area on the one circuit board and mounting the other circuit board over the area on the one circuit board such that components on an underside of the other circuit board firmly contact the thermal conductivity layer so as to conduct heat from the components through the one circuit board. The method may include additional steps, such as etching the predetermined area of the top surface of the one circuit board to provide a copper planar member, drilling holes through the one circuit board, and filling the holes with a conductive material to form conductive vias linking the copper planar member with a ground planar member within the one circuit board.

摘要翻译： 一种电路板用作另一电路板的散热器的装置和方法，其在一个电路板主动产生自身热量的同时有效地将热量从另一个电路板吸走。 由于一个电路板比另一个电路板大得多，所以一个电路板的热质量足够大，以便在存在强制空气冷却的情况下吸收和扩散由两个电路板产生的热量。 该方法包括以下步骤：将导热层安装在一个电路板上的预定区域上，并将另一个电路板安装在一个电路板上的区域上，使得另一个电路板下侧的部件牢固地接触热导率 以便通过一个电路板从组件传导热量。 该方法可以包括附加步骤，例如蚀刻一个电路板的顶表面的预定区域以提供铜平面构件，穿过一个电路板钻孔，以及用导电材料填充孔以形成导电通孔连接 所述铜平面构件在一个电路板内具有接地平面构件。

公开(公告)号：US07162560B2

公开(公告)日：2007-01-09

申请号：US10751250

申请日：2003-12-31

申请人： Billy K. Taylor ,  Mohan J. Kumar ,  Wilson E. Smoak ,  David J. O'Shea ,  Bassam N. Coury ,  Priscilla Lam ,  Tom Slaight

发明人： Billy K. Taylor ,  Mohan J. Kumar ,  Wilson E. Smoak ,  David J. O'Shea ,  Bassam N. Coury ,  Priscilla Lam ,  Tom Slaight

IPC分类号： G06F13/24 ,  G06F15/00

CPC分类号： G06F15/177 ,  G06F1/24 ,  G06F9/45533

摘要： A system that may optionally be partitioned into multiple domains is disclosed. Each domain is capable of independently powering on, executing a firmware program, and loading an operating system, including a legacy operating system, as well as running an application program that is distinct from programs running on another domain. Interrupts, including boot interrupts, reset handlers, and inter-chassis communications are initialized differently, depending on whether the system is to be partitioned or not. The cost of redundant hardware and/or firmware is substantially avoided, yet the system fully supports multiple domains.

摘要翻译： 公开了可选地被划分成多个域的系统。 每个域都能够独立地加电，执行固件程序，以及加载包括旧版操作系统在内的操作系统，以及运行与在其他域上运行的程序不同的应用程序。 中断，包括引导中断，复位处理程序和机架间通信根据系统是否要进行分区，进行不同的初始化。 基本上避免了冗余硬件和/或固件的成本，但是系统完全支持多个域。

公开(公告)号：US5053639A

公开(公告)日：1991-10-01

申请号：US367293

申请日：1989-06-16

申请人： Billy K. Taylor

发明人： Billy K. Taylor

IPC分类号： H03K5/156

CPC分类号： H03K5/1565

摘要： A device and method for generating a symmetrical clock signal. The device comprises a signal generator, buffer and differential amplifier. The signal generator generates a periodic wave signal. The buffer receives the periodic wave signal and provides a square wave clock signal. The differential amplifier receives the clock signal and a reference voltage signal and provides an error signal to the buffer.

摘要翻译： 一种用于产生对称时钟信号的装置和方法。 该装置包括信号发生器，缓冲器和差分放大器。 信号发生器产生周期波信号。 缓冲器接收周期波信号并提供方波时钟信号。 差分放大器接收时钟信号和参考电压信号，并向缓冲器提供误差信号。

公开(公告)号：US5825630A

公开(公告)日：1998-10-20

申请号：US744964

申请日：1996-11-07

申请人： Billy K. Taylor ,  Richard I. Mellitz

发明人： Billy K. Taylor ,  Richard I. Mellitz

IPC分类号： H05K1/14 ,  H05K3/32 ,  H05K3/34 ,  H05K3/36 ,  H05K7/02 ,  H01R23/72 ,  H05K7/06

CPC分类号： H05K1/141 ,  H05K7/023 ,  H05K2201/10333 ,  H05K2201/10689 ,  H05K3/323 ,  H05K3/3436 ,  H05K3/368

摘要： A computer baseboard providing localized support for high pin count, high density components. The baseboard includes a first circuit board capable of supporting low pin count electrical components. The first circuit board has a surface onto which the low pin count electrical components are mounted, and an area to which a second, smaller, circuit board is connected in a parallel arrangement with the first circuit board. The second circuit board has a first surface onto which high pin count electrical components are mounted, and a second surface physically and electrically connected to the area on said first substrate. The first and second circuit boards together provide support for electrical components having higher pin counts and densities than the first circuit board can support individually, such as high performance microprocessors and chipsets. The first circuit board may be a low circuit density substrate while the second circuit board is a high circuit density substrate or multiple substrate layer board. Additionally, the second circuit board can be constructed of materials with better electrical characteristics, such as Cyanate Ester or other material having a low relative permeability, providing an advantage in meeting the tight timing characteristics of new, high performance microprocessors and chipsets.

摘要翻译： 电脑底板为高引脚数，高密度元件提供本地化支持。 该基板包括能够支持低引脚数的电气部件的第一电路板。 第一电路板具有安装有低引脚数电气部件的表面和与第一电路板并联连接的第二较小电路板的区域。 第二电路板具有安装有高引脚数电气部件的第一表面和与第一基板上的区域物理和电连接的第二表面。 第一和第二电路板一起为具有比第一电路板可以单独支持的更高的引脚数和密度的电部件提供支持，例如高性能微处理器和芯片组。 第一电路板可以是低电路密度衬底，而第二电路板是高电路密度衬底或多个衬底层板。 此外，第二电路板可以由具有更好电气特性的材料构成，例如氰酸酯或具有低相对磁导率的其它材料，提供了满足新的高性能微处理器和芯片组的紧密定时特性的优点。

公开(公告)号：US4941157A

公开(公告)日：1990-07-10

申请号：US338832

申请日：1989-04-14

申请人： Billy K. Taylor

发明人： Billy K. Taylor

IPC分类号： G06F13/42

CPC分类号： G06F13/4213

摘要： The subject invention is an interface circuit between a requesting device and a responding device. The circuit comprises a flip-flop responsive to a request signal received from the requesting device and a handshake signal received from the responding device to generate a control signal. The circuit also comprises a gate for receiving the control and handshake signals and generating an acknowledge signal. The removal of the request signal sets the control signal to a first value which disables the gate and removal of the handshake signal resets the control signal to a second value which enables the gate.

摘要翻译： 本发明是请求设备和响应设备之间的接口电路。 电路包括响应于从请求设备接收的请求信号的触发器和从响应设备接收的握手信号以产生控制信号。 电路还包括用于接收控制和握手信号并产生确认信号的门。 去除请求信号将控制信号设置为禁止门控的第一值，并且将握手信号的去除将控制信号重置为使能门的第二值。

公开(公告)号：US4823324A

公开(公告)日：1989-04-18

申请号：US778815

申请日：1985-09-23

申请人： Billy K. Taylor ,  Larry C. James

发明人： Billy K. Taylor ,  Larry C. James

IPC分类号： G11C11/401 ,  G06F12/02 ,  G06F12/06 ,  G11C7/00 ,  G11C7/10 ,  G11C8/00 ,  G11C8/12 ,  G11C8/18

CPC分类号： G11C7/1021 ,  G11C8/12 ,  G11C8/18

摘要： A memory device is disclosed which is comprised of a plurality of memory boards each having at least one memory bank associated therewith with each memory bank including a plurality of memory elements addressable by rows and columns. In page-mode operation of the memory device, all of the memory elements receive the active row address strobe signal RAS. The RAS signal is maintained active as long as the memory is to remain in page-mode operation. Memory address information is decoded to select a memory board and a memory bank from the plurality of memory boards and to enable the memory elements to permit either a read or a write operation without the need for performing additional address strobe cycles.

摘要翻译： 公开了一种存储器件，其包括多个存储器板，每个存储器板具有与其相关联的至少一个存储体，每个存储体包括可由行和列寻址的多个存储器元件。 在存储器件的页模式操作中，所有存储器元件都接收有效的行地址选通信号RAS。 只要存储器保持页模式操作，则RAS信号保持有效。 存储器地址信息被解码以从多个存储器板中选择存储器板和存储体，并且使得存储器元件能够允许读取或写入操作，而不需要执行附加的地址选通周期。