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公开(公告)号:US20230154401A1
公开(公告)日:2023-05-18
申请号:US17621861
申请日:2021-01-19
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Mei LI , Tian DONG , Li WANG , Guangliang SHANG , Can ZHENG
IPC: G09G3/3233 , G09G3/3266 , G09G3/3275
CPC classification number: G09G3/3233 , G09G3/3266 , G09G3/3275 , G09G2300/0842 , G09G2320/0214
Abstract: A display panel and a display device are provided. The display panel includes: a pixel unit including a pixel circuit and a light-emitting element, the pixel circuit including a first transistor, the pixel unit including a first pixel unit and a second pixel unit located in a same row and adjacent columns; a first gate line and a second gate line, connected to gate electrodes of the first transistors of the first pixel unit and the second pixel unit; a first gate signal line, connected to the first pixel unit; a second gate signal line, connected to the second pixel unit; a first connection line connected with the first gate signal line through the first connection line; and a second connection line connected with the second gate signal line through the second connection line.
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公开(公告)号:US20230147984A1
公开(公告)日:2023-05-11
申请号:US18092974
申请日:2023-01-04
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Can ZHENG
IPC: G09G3/20
CPC classification number: G09G3/2092 , G09G2310/0286
Abstract: A shift register unit, a driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a first input circuit, a second input circuit, an output circuit, a first control circuit, and a second control circuit. The first input circuit is electrically connected to a first node, and is configured to transmit an input signal to the first node; the second input circuit is electrically connected to the first node and a second node, and is configured to control a level of the second node; the first control circuit is electrically connected to the second node and a third node, and is configured to control a level of the third node ; and the output circuit is electrically connected to the third node and an output terminal, and is configured to output an output signal to the output terminal.
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13.
公开(公告)号:US20230042966A1
公开(公告)日:2023-02-09
申请号:US17793841
申请日:2021-05-17
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Lujiang HUANGFU , Li WANG , Can ZHENG , Tian DONG , Libin LIU
IPC: G09G3/3258
Abstract: A pixel driving circuit includes: an energy storage sub-circuit, a reset sub-circuit, a compensation sub-circuit, a driving sub-circuit, and a current leakage suppression sub-circuit. The energy storage sub-circuit is coupled to a first node and a second node. The reset sub-circuit is coupled to the second node, a first scan timing signal terminal, and an initialization signal terminal. The compensation sub-circuit is coupled to the second node, a third node, and a second scan timing signal terminal. The driving sub-circuit is coupled to the second node, the third node, and a first voltage signal terminal. The current leakage suppression sub-circuit is coupled to the energy storage sub-circuit, the reset sub-circuit, and the compensation sub-circuit. The current leakage suppression sub-circuit is configured to suppress current leakage of the energy storage sub-circuit in a process of generating and transmitting the driving signal by the driving sub-circuit.
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公开(公告)号:US20220351666A1
公开(公告)日:2022-11-03
申请号:US17594771
申请日:2020-10-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Tian DONG , Can ZHENG , Li WANG , Long HAN , Yu FENG , Hao ZHANG , Jiangnan LU , Jie ZHANG , Bo WANG , Jingquan WANG
IPC: G09G3/20
Abstract: The display panel includes a plurality of rows and a plurality of columns of pixel circuits, a plurality of rows of gate lines, a plurality rows of reset control lines, and a plurality of columns of data lines, a same row of pixel circuits corresponds to two rows of gate lines, and one/the other row of gate line is electrically connected to odd/even-numbered columns of pixel circuits in the row of pixel circuits, and provides a corresponding gate driving signal for the odd/even-numbered columns of pixel circuits; a same column of pixel circuits corresponds to two columns of data lines, and one/the other column of data line of the two columns of data lines is electrically connected to odd/even-numbered rows of pixel circuits, and provides a corresponding data voltage for the odd/even-numbered rows of pixel circuits.
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公开(公告)号:US20220199022A1
公开(公告)日:2022-06-23
申请号:US17599387
申请日:2021-01-14
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Lujiang HUANGFU , Libin LIU , Can ZHENG
IPC: G09G3/3233
Abstract: The present disclosure provides a display panel, a pixel circuit and a method for driving the pixel circuit, the pixel circuit includes: a storage capacitor circuit; a light-emitting element; a driving transistor; a reset circuit, the reset circuit is configured to receive a reset control signal and reset a first node and a second node according to the reset control signal, or receive a writing control signal and/or a timing sequence control signal of an adjacent pixel row and reset the first node and the second node according to the writing control signal and/or the timing sequence control signal of the adjacent pixel row; a threshold compensation circuit, configured to receive a compensation control signal and write a compensation voltage into the first node according to the compensation control signal; a writing circuit; and a light-emitting control circuit.
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公开(公告)号:US20210358367A1
公开(公告)日:2021-11-18
申请号:US16613125
申请日:2019-05-21
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Can ZHENG
Abstract: A shift register and a driving method thereof, a gate drive circuit, and a display device are provided. The shift register includes: an input circuit, configured to input an input voltage provided by the input voltage terminal to an intermediate circuit under control of a first clock signal provided by the first clock signal terminal; the intermediate circuit, configured to write a second clock signal output by the second clock signal terminal or a first power signal output by the first power terminal to the intermediate output terminal as an intermediate output signal under control of the input voltage and the control circuit; and an output circuit, configured to output an output signal, a phase of which is opposite to a phase of the intermediate output signal.
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17.
公开(公告)号:US20180091151A1
公开(公告)日:2018-03-29
申请号:US15519966
申请日:2016-10-13
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
IPC: H03K19/096 , G09G3/3266 , G11C19/28
CPC classification number: H03K19/096 , G09G3/3266 , G11C19/184 , G11C19/28
Abstract: Embodiments of the present disclosure provide a shift register and a driving method thereof, a gate driving circuit and a display device. The shift register includes a control signal generation module, a first low level pulse generation module, a second low level pulse generation module, and a high level pulse generation module. The control signal generation module generates a first control signal and a second control signal. The first low level pulse generation module receives the first control signal and the second control signal and generate a first low level pulse signal. The second low level pulse generation module receives the first control signal and the second control signal and generate a second low level pulse signal. The high level pulse generation module receives the first control signal and generates a high level pulse signal. This shift register reduces the number of circuit elements.
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公开(公告)号:US20180090064A1
公开(公告)日:2018-03-29
申请号:US15521564
申请日:2016-08-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Ying LIU , Chenggeng ZHANG , Zhaohui MENG , Hongwei TIAN , Juanjuan BAI , Meng SHAO , Wen SUN , Can ZHENG , Hualing YANG
IPC: G09G3/3233
Abstract: A method, a circuit and a display device for driving an organic light emitting diode, wherein a driving transistor (DTFT) for driving a display element is turned off by jumping one or more of a reference voltage input (Vref), a reset voltage input (Vinit) and a data signal input (Vdata) before beginning to output an EL high level (ELVDD) of a pixel compensation circuit and after beginning to output an EL low level (ELVSS), to overcome the splash screen phenomenon during power-up and direct current-direct current driving failure.
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19.
公开(公告)号:US20250095579A1
公开(公告)日:2025-03-20
申请号:US18964486
申请日:2024-12-01
Applicant: BOE Technology Group Co., Ltd.
Inventor: Can ZHENG
IPC: G09G3/3233 , G09G3/3266 , G09G3/3291
Abstract: Disclosed are a pixel circuit, a driving method of the pixel circuit and a display device, the pixel circuit including a reset unit, a voltage writing unit and a light-emitting control unit, the reset unit is connected to a reset control signal terminal, and resets the pixel circuit under the control of the reset control signal; the voltage writing unit stores a data signal and a threshold voltage of a driving transistor under the control of the scan control signal; the light-emitting control unit is connected to a light-emitting control signal terminal and includes the driving transistor, and use the data signal and the threshold voltage to generate a current under control of the light-emitting control signal; the light-emitting control unit includes a first type transistor, the reset unit and the voltage writing unit include a second type transistor different from the first type transistor.
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公开(公告)号:US20250063912A1
公开(公告)日:2025-02-20
申请号:US18938307
申请日:2024-11-06
Applicant: BOE Technology Group Co., Ltd.
Inventor: Can ZHENG , Li WANG , Hao ZHANG , Yipeng CHEN , Ke LIU
IPC: H10K59/131 , G09G3/3233 , G09G3/3266 , G09G3/3291 , H10K59/12 , H10K59/121
Abstract: A display substrate and a manufacturing method therefor, and a display apparatus. The display substrate includes a base substrate, a second power line, a data signal line and a plurality of sub-pixels, wherein at least one sub-pixel includes a pixel driving circuit and a light emitting device connected to the pixel driving circuit; a semiconductor layer and a plurality of conducting layers, which are disposed at one side of the semiconductor layer away from the base substrate, are disposed on the base substrate, a first electrode is arranged in at least one conducting layer, the first electrode is connected to the second power line, and there is an overlapping area between an orthographic projection of the first electrode on the base substrate and an orthographic projection of the data signal line on the base substrate.
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