公开(公告)号：US20240090290A1

公开(公告)日：2024-03-14

申请号：US17753393

申请日：2021-04-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Libin LIU ,  Shiming SHI ,  Jiangnan LU ,  Jianchao ZHU

IPC: H10K59/131 ,  H10K59/35 ,  H10K59/80

CPC classification number: H10K59/1315 ,  H10K59/353 ,  H10K59/80515

Abstract: A display substrate and a display device are provided, the display substrate includes: a substrate, and a power source layer, a conductive layer, and a cathode layer sequentially stacked on the substrate in a direction away from the substrate; the conductive layer includes first conductive patterns and second conductive patterns insulated from each other, the first conductive patterns are coupled to the power source layer, and the second conductive patterns are coupled to the cathode layer.

公开(公告)号：US20240029660A1

公开(公告)日：2024-01-25

申请号：US18464404

申请日：2023-09-11

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jiangnan LU ,  Can ZHENG

IPC: G09G3/3266 ,  H10K59/131 ,  G11C19/28

CPC classification number: G09G3/3266 ,  H10K59/131 ,  G11C19/28 ,  G09G2300/0852 ,  G09G2310/0286

Abstract: A display substrate, a manufacturing method thereof and a display device are provided. The display substrate includes a base substrate, and a shift register unit, a first clock signal line and a second clock signal line which are on the peripheral region of the base substrate; the first clock signal line and the second clock signal line extend along a first direction; an active layer of the first control transistor, an active layer of the second control transistor, and an active layer of the third control transistor respectively extend along a second direction, and the active layer of the first control transistor, the active layer of the second control transistor, and the active layer of the third control transistor are on a side of the first clock signal line and the second clock signal line close to the display region, and are arranged side by side in the first direction.

公开(公告)号：US20220399411A1

公开(公告)日：2022-12-15

申请号：US17598894

申请日：2020-12-23

Applicant: BOE Technology Group Co., Ltd.

Inventor： Xin LI ,  Xing FAN ,  Jing YANG ,  Jiangnan LU ,  Yansong LI

IPC: H01L27/32 ,  H01L51/56 ,  H01L51/52

Abstract: Provided are a display substrate, a preparation method thereof and a display apparatus. The display substrate includes a substrate and a plurality of pixel units disposed in matrix on the substrate, wherein each pixel unit includes a plurality of sub-pixels, and each sub-pixel includes a driving structure layer, a first electrode and a first pixel define layer on the driving structure layer, and a light absorption layer disposed on the first pixel define layer. The first pixel define layer includes a plurality of first barriers and first pixel openings disposed between the first barriers, the first pixel opening exposes at least part of the first electrode, and the first pixel opening includes a first surface close to the first electrode, a second surface opposite to the first surface and a first sidewall between the first and second surfaces.

公开(公告)号：US20220351666A1

公开(公告)日：2022-11-03

申请号：US17594771

申请日：2020-10-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Tian DONG ,  Can ZHENG ,  Li WANG ,  Long HAN ,  Yu FENG ,  Hao ZHANG ,  Jiangnan LU ,  Jie ZHANG ,  Bo WANG ,  Jingquan WANG

IPC: G09G3/20

Abstract: The display panel includes a plurality of rows and a plurality of columns of pixel circuits, a plurality of rows of gate lines, a plurality rows of reset control lines, and a plurality of columns of data lines, a same row of pixel circuits corresponds to two rows of gate lines, and one/the other row of gate line is electrically connected to odd/even-numbered columns of pixel circuits in the row of pixel circuits, and provides a corresponding gate driving signal for the odd/even-numbered columns of pixel circuits; a same column of pixel circuits corresponds to two columns of data lines, and one/the other column of data line of the two columns of data lines is electrically connected to odd/even-numbered rows of pixel circuits, and provides a corresponding data voltage for the odd/even-numbered rows of pixel circuits.

公开(公告)号：US20210408153A1

公开(公告)日：2021-12-30

申请号：US16959376

申请日：2019-07-31

Applicant: Chengdu BOE Optoelectronics Technology Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Kaipeng SUN ,  Yuanyou QIU ,  Weiyun HUANG ,  Yue LONG ,  Chao ZENG ,  Jiangnan LU ,  Libin LIU ,  Hongli WANG

IPC: H01L27/32

Abstract: An electroluminescent display panel includes a plurality of repeating units each including a first conductive layer, a first insulating layer including a first via hole, and an anode including a main body and an auxiliary portion. At least one repeating unit includes a first-color sub-pixel, a second-color sub-pixel, and a third-color sub-pixel; the area of the main body of the third-color sub-pixel is larger than that of the second-color sub-pixel and that of the first-color sub-pixel; and an overlapping area between the main body of the third-color sub-pixel and the first conductive layer is larger than that between the main body of the second-color sub-pixel and the first conductive layer, and the overlapping area between the main body of the third-color sub-pixel and the first conductive layer is larger than that between the main body of the first-color sub-pixel and the first conductive layer.

公开(公告)号：US20240290244A1

公开(公告)日：2024-08-29

申请号：US18655073

申请日：2024-05-03

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Tian DONG ,  Can ZHENG ,  Li WANG ,  Long HAN ,  Yu FENG ,  Hao ZHANG ,  Jiangnan LU ,  Jie ZHANG ,  Bo WANG ,  Jingquan WANG

IPC: G09G3/20

CPC classification number: G09G3/2092 ,  G09G2310/0297 ,  G09G2310/061

Abstract: The display panel includes a plurality of rows and a plurality of columns of pixel circuits, a plurality of rows of gate lines, a plurality rows of reset control lines, and a plurality of columns of data lines, a same row of pixel circuits corresponds to two rows of gate lines, and one/the other row of gate line is electrically connected to odd/even-numbered columns of pixel circuits in the row of pixel circuits, and provides a corresponding gate driving signal for the odd/even-numbered columns of pixel circuits; a same column of pixel circuits corresponds to two columns of data lines, and one/the other column of data line of the two columns of data lines is electrically connected to odd/even-numbered rows of pixel circuits, and provides a corresponding data voltage for the odd/even-numbered rows of pixel circuits.

公开(公告)号：US20240249687A1

公开(公告)日：2024-07-25

申请号：US18016361

申请日：2022-02-28

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiangnan LU ,  Ke FENG

IPC: G09G3/3275 ,  G09G3/3266

CPC classification number: G09G3/3275 ,  G09G3/3266 ,  G09G2310/0286

Abstract: A display substrate and a display apparatus are disclosed, the display substrate includes multiple light emitting output lines connected with a light emitting drive circuit and multiple scan output lines connected with a scan drive circuit; at least one light emitting output line includes at least two light emitting output parts connected with each other, a scan output line has an integrally formed structure, or, a light emitting output line has an integrally formed structure, at least one scan output line includes at least two scan output parts connected with each other, or at least one light emitting output line includes at least two light emitting output parts connected with each other, at least one scan output line includes at least two scan output parts connected with each other; at least two light emitting output parts located on a same light emitting output line are arranged in different layers.

公开(公告)号：US20240169924A1

公开(公告)日：2024-05-23

申请号：US17778916

申请日：2021-06-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Guangliang SHANG ,  Libin LIU ,  Mengyang WEN ,  Jiangnan LU ,  Li WANG ,  Long HAN

IPC: G09G3/3266 ,  G09G3/3233 ,  H10K59/131

CPC classification number: G09G3/3266 ,  G09G3/3233 ,  H10K59/131 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/0233 ,  G09G2320/0257 ,  G09G2330/021

Abstract: The embodiments of the present disclosure provides a display substrate, including: an active region and a peripheral region, the active region is provided therein with a plurality of pixel units arranged in an array, all the pixel units are divided into n pixel unit groups, the peripheral region is provided therein with a driver block including a first gate drive circuit having n+x first signal output terminals configured to sequentially output first gate drive signals in an active level and the first gate line provided for an ith pixel unit group is electrically connected to a (i+x)th first signal output terminal, and the reset signal line provided for the ith pixel unit group is electrically connected to an ith first signal output terminal, with i being a positive integer and i≤n.

公开(公告)号：US20230419878A1

公开(公告)日：2023-12-28

申请号：US18466619

申请日：2023-09-13

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Guangliang SHANG ,  Jie ZHANG ,  Jiangnan LU ,  Mei LI ,  Libin LIU

IPC: G09G3/20

CPC classification number: G09G3/2092 ,  G09G2300/0426 ,  G09G2300/0842 ,  G09G2310/0267 ,  G09G2330/021

Abstract: A gate driving unit includes a first input node control circuit and a charge pump circuit; the first input node control circuit controls to connect or disconnect the input terminal and the first input node under the control of a clock signal provided by the clock signal terminal; the charge pump circuit controls to convert a voltage signal of the first input node into a voltage signal of the first node under the control of an input clock signal provided by the input clock signal terminal when the voltage signal of the first input node is a first voltage signal.

公开(公告)号：US20230180551A1

公开(公告)日：2023-06-08

申请号：US17923934

申请日：2021-11-04

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jiangnan LU ,  Libin LIU ,  Guangliang SHANG ,  Long HAN ,  Yu FENG ,  Li WANG ,  Mei LI

IPC: H10K59/131 ,  H10K59/12

CPC classification number: H10K59/131 ,  H10K59/1201 ,  H10K59/124

Abstract: A display panel includes: a substrate; at least one first signal line disposed on the substrate and located in a peripheral region; at least one second signal line disposed on the substrate and located in the peripheral region; an insulating layer covering the at least one first signal line and the at least one second signal line; and a shielding signal line covering the at least one groove. The at least one second signal line and the at least one first signal line are arranged in a same layer. A surface of the insulating layer away from the substrate has at least one groove. An orthogonal projection, on the substrate, of a bottom surface of a groove is located between orthogonal projections, on the substrate, of a first signal line and a second signal line.