公开(公告)号：US06538086B1

公开(公告)日：2003-03-25

申请号：US09514921

申请日：2000-02-28

Applicant: Sheng-Yueh Chang ,  Bang-Chein Ho ,  Jui-Fa Chang ,  Jian-Hong Chen ,  Ming-Chia Tai

Inventor： Sheng-Yueh Chang ,  Bang-Chein Ho ,  Jui-Fa Chang ,  Jian-Hong Chen ,  Ming-Chia Tai

IPC: C08F3402

CPC classification number: C08F232/04 ,  C08F232/08 ,  G03F7/0045 ,  G03F7/039 ,  Y10S430/106

Abstract: The present invention relates to a polymer with at least one pericyclic protective group such as 2-methyl-2-bicyclo[2,2,1]heptanyl. The resist composition containing the polymer can be used as a chemically amplified resist and exhibits strong etch resistance. In addition, a line-and-space pattern of 0.1 &mgr;m pitch can be resolved successfully using the resist composition.

Abstract translation: 本发明涉及具有至少一个周环保护基团的聚合物，例如2-甲基-2-双环[2,2,1]庚基。 含有该聚合物的抗蚀剂组合物可以用作化学放大型抗蚀剂并具有很强的抗蚀刻性。 此外，可以使用抗蚀剂组合物成功地解决0.1μm间距的线间距图案。

公开(公告)号：US06303725B1

公开(公告)日：2001-10-16

申请号：US09675875

申请日：2000-09-29

Applicant: Sheng-Yueh Chang ,  Bang-Chein Ho ,  Jian-Hong Chen ,  Ting-Chun Liu ,  Tzu-Yu Lin

Inventor： Sheng-Yueh Chang ,  Bang-Chein Ho ,  Jian-Hong Chen ,  Ting-Chun Liu ,  Tzu-Yu Lin

IPC: C08F3400

CPC classification number: C08F32/00 ,  C09D4/00 ,  C08F232/00

Abstract: The present invention provides a cyclic dione polymer, which is a homopolymer or a copolymer of a cyclic dione monomer selected from those represented by formulae (I) and (II) wherein A and B may be the same or different and are independently selected from the group consisting of halogen, hydrogen, C3-20 cyclic or pericyclic alkyl, C1-20 linear and branched alkyl, C6-20 aryl, C7-20 arylalkyl, C7-20 alkylaryl, silyl, alkylsilyl, germyl, alkylgermyl, alkoxycarbonyl, acyl, and a heterocylic group; or, A and B are linked together to form a C3-20 saturated or unsaturated cyclic hydrocarbon group or a substituted or unsubstituted heterocyclic group; C is selected from the group consisting of oxygen, sulfur, —CH2—, and —SiH2—, wherein each R1 is independently selected from C1-20 alkyl and phenyl.

Abstract translation: 本发明提供环状二酮聚合物，其是选自由式（I）和（II）表示的环状二酮单体的均聚物或共聚物，其中A和B可以相同或不同，并且独立地选自 由卤素，氢，C 3-20环状或脂环族烷基，C 1-20直链和支链烷基，C6-20芳基，C7-20芳基烷基，C7-20烷基芳基，甲硅烷基，烷基甲硅烷基，甲基，烷基锗烷基，烷氧基羰基，酰基和 杂环组 或者A和B连接在一起形成C3-20饱和或不饱和环状烃基或取代或未取代的杂环基; C选自氧，硫，-CH 2 - 和-SiH 2 - ，其中 每个R 1独立地选自C 1-20烷基和苯基。

公开(公告)号：US07419771B2

公开(公告)日：2008-09-02

申请号：US11033647

申请日：2005-01-11

Applicant: Bang-Chein Ho ,  Jian-Hong Chen

Inventor： Bang-Chein Ho ,  Jian-Hong Chen

IPC: G03F7/26

CPC classification number: G03F7/40

Abstract: A method for reducing a critical dimension of a photoresist pattern while improving a line spacing between distal end portions of pattern lines wherein the method includes providing a substrate including an overlying resist; exposing the resist to an activating light source; baking the resist in a first baking process followed by developing the resist in a first development process to form a first resist pattern; then baking the first resist pattern in a second baking process followed by developing the first resist pattern in a second development process to form a second resist pattern having reduced dimensions; and, then dry trimming the second resist pattern to form a final resist pattern with reduced dimensions compared to the second resist pattern.

Abstract translation: 一种降低光致抗蚀剂图案的临界尺寸的方法，同时改善图案线的远端部分之间的线间距，其中该方法包括提供包括上覆抗蚀剂的基底; 将抗蚀剂暴露于活化光源; 在第一烘烤过程中烘烤抗蚀剂，然后在第一显影过程中显影抗蚀剂以形成第一抗蚀剂图案; 然后在第二烘烤过程中烘烤第一抗蚀剂图案，随后在第二显影过程中显影第一抗蚀剂图案，以形成尺寸减小的第二抗蚀剂图案; 然后干燥修整第二抗蚀剂图案以形成与第二抗蚀剂图案相比尺寸减小的最终抗蚀剂图案。

公开(公告)号：US20070212877A1

公开(公告)日：2007-09-13

申请号：US11748574

申请日：2007-05-15

Applicant: Bang-Chein Ho ,  Jian-Hong Chen ,  D.J. Ou-Yang

Inventor： Bang-Chein Ho ,  Jian-Hong Chen ,  D.J. Ou-Yang

IPC: H01L21/4763

CPC classification number: H01L21/76808

Abstract: An improved method of forming an integrated circuit that includes a dual damascene interconnect is described. A contact via hole is formed in a dielectric layer disposed above a semiconductor substrate. A protective layer is disposed on top of the dielectric layer and in the contact via hole, and subsequently forming as a recessed plug in the via, followed by etching to form a trench to complete formation of a dual damascene opening.

Abstract translation: 描述了一种形成包括双镶嵌互连的集成电路的改进方法。 在设置在半导体衬底上的电介质层中形成接触通孔。 保护层设置在电介质层的顶部和接触通孔中，随后在通孔中形成凹入的塞子，然后蚀刻以形成沟槽以完成双镶嵌开口的形成。

公开(公告)号：US07235348B2

公开(公告)日：2007-06-26

申请号：US10443359

申请日：2003-05-22

Applicant: Bang-Chein Ho ,  Jian-Hong Chen ,  Yusuke Takano ,  Ping-Hung Lu

Inventor： Bang-Chein Ho ,  Jian-Hong Chen ,  Yusuke Takano ,  Ping-Hung Lu

IPC: G03F7/26

CPC classification number: G03F7/2022 ,  G03F7/0035 ,  G03F7/038 ,  G03F7/095

Abstract: In accordance with the objectives of the invention a new water soluble negative photoresist is provided for packing-and-unpacking (PAU) processing steps.

Abstract translation: 根据本发明的目的，提供了一种新的水溶性负性光致抗蚀剂用于包装和包装（PAU）处理步骤。

公开(公告)号：US07094686B2

公开(公告)日：2006-08-22

申请号：US10737024

申请日：2003-12-16

Applicant: Dahchung Oweyang ,  Jian-Hong Chen ,  Bang-Chein Ho

Inventor： Dahchung Oweyang ,  Jian-Hong Chen ,  Bang-Chein Ho

IPC: H01L21/4763

CPC classification number: H01L21/76816 ,  G03F1/70 ,  G03F7/0035 ,  H01L21/0274

Abstract: A method is provided for the creation of contact holes. The invention provides two masks. The first mask, referred to as the packed mask, comprises the desired contact holes, which are part of the creation of a semiconductor device. To the packed mask are added padding holes in order to increase the hole density of the packed mask. An insulation layer is formed to protect the first layer of material. The second mask, referred to an the unpacking mask, comprises openings at the same locations as the locations of the padding holes of the first mask, the openings provided in the second mask have slightly larger dimensions than the padding holes of the first mask. A first exposure is made using the packed mask, a second exposure of the same surface area is made using the unpacking mask. The unpacking mask is used to selectively cover the padding contact holes, resulting in the final image. Two types of unpacking masks can be used, a first type having unpacking holes that surround the desired hole pattern, a second type having unpacking holes that align with the desired hole pattern.

Abstract translation: 提供了一种创建接触孔的方法。 本发明提供了两个掩模。 称为包装掩模的第一掩模包括期望的接触孔，这是半导体器件的创建的一部分。 为了增加包装面罩的孔密度，向包装的面膜中加入填充孔。 形成绝缘层以保护第一层材料。 第二掩模（称为开封掩模）包括与第一掩模的填充孔的位置相同位置处的开口，设置在第二掩模中的开口具有比第一掩模的填充孔稍大的尺寸。 使用包装掩模进行第一次曝光，使用开封掩模进行相同表面积的第二次曝光。 打开包装的面罩用于选择性地覆盖填充接触孔，产生最终的图像。 可以使用两种类型的开封掩模，第一类型具有围绕所需孔图案的开封孔，第二类型具有与期望的孔图案对准的开封孔。

公开(公告)号：US20050191840A1

公开(公告)日：2005-09-01

申请号：US10789083

申请日：2004-02-27

Applicant: Bang-Chein Ho ,  Jian-Hong Chen ,  D.J. Ou-Yang

Inventor： Bang-Chein Ho ,  Jian-Hong Chen ,  D.J. Ou-Yang

IPC: H01L21/4763 ,  H01L21/768

CPC classification number: H01L21/76808

Abstract: An improved method of forming an integrated circuit that includes a dual damascene interconnect is described. A contact via hole is formed in a dielectric layer disposed above a semiconductor substrate. A protective layer is disposed on top of the dielectric layer and in the contact via hole, and subsequently forming as a recessed plug in the via, followed by etching to form a trench to complete formation of a dual damascene opening.

Abstract translation: 描述了一种形成包括双镶嵌互连的集成电路的改进方法。 在设置在半导体衬底上的电介质层中形成接触通孔。 保护层设置在电介质层的顶部和接触通孔中，随后在通孔中形成凹入的塞子，然后蚀刻以形成沟槽以完成双镶嵌开口的形成。

公开(公告)号：US06905621B2

公开(公告)日：2005-06-14

申请号：US10268586

申请日：2002-10-10

Applicant: Bang-Chein Ho ,  Jian-Hong Chen

Inventor： Bang-Chein Ho ,  Jian-Hong Chen

IPC: G03F7/00 ,  H01L21/027 ,  B44C1/22

CPC classification number: H01L21/0274 ,  G03F7/0035

Abstract: A method is provided for removing sidelobes that are formed when patterning a positive photoresist layer with an Att. PSM, Alt. PSM or a binary mask with scattering bars. A water soluble negative tone photoresist is coated over the positive photoresist pattern and is exposed through a mask having small islands that correspond in shape, size and location to the small holes in the mask used to pattern the positive tone photoresist. After development, exposed negative tone photoresist covers sidelobes formed by the positive tone process. The negative tone photoresist functions as a mask for a subsequent etch transfer of the positive tone pattern into the substrate. A method of aligning openings in a positive tone pattern over the same openings in a negative tone pattern is also useful in preventing sidelobes in the positive tone photoresist from being transferred into the substrate.

Abstract translation: 提供了一种用于去除在用Ar形成正性光致抗蚀剂层时形成的旁瓣的方法。 PSM，Alt PSM或具有散射条的二进制掩码。 将水溶性负色调光致抗蚀剂涂覆在正性光致抗蚀剂图案上，并通过具有小形状的掩模将其形状，尺寸和位置对应于用于图案化正色调光致抗蚀剂的掩模中的小孔曝光。 显影后，曝光的负光致抗蚀剂覆盖由正色调处理形成的旁瓣。 负色调光阻用作掩模，用于随后将正色调图案蚀刻转移到衬底中。 在负色调图案的相同开口上以正色调图案对准开口的方法也可用于防止正色调光致抗蚀剂中的旁瓣被转移到基底中。

公开(公告)号：US20060189146A1

公开(公告)日：2006-08-24

申请号：US11061056

申请日：2005-02-18

Applicant: Dah-Chung Oweyang ,  Chih-Cheng Lin ,  Hsueh-Liang Hung ,  Bang-Chein Ho

Inventor： Dah-Chung Oweyang ,  Chih-Cheng Lin ,  Hsueh-Liang Hung ,  Bang-Chein Ho

IPC: H01L21/469

CPC classification number: G03F7/38 ,  G03F7/091 ,  H01L21/0276

Abstract: In the manufacture of a semiconductor, a DBARC layer is deposited upon a wafer to prevent reflection. A photo resist layer is deposited upon the DBARC layer and the wafer is selectively exposed to irradiation. The irradiation generates photo acid (H+ ions) in the exposed areas of the photo resist and DBARC. In order to provide better resolution in the DBARC for micro-features, an electric field is generated vertically through the coated wafer before or during post exposure baking (PEB) to create a uniform vertical distribution of H+ ions though the DBARC. The coated wafer is then developed to remove either the unexposed portions, or exposed portion of the DBARC. The cavities formed by the developer have side walls that are substantially vertical as a result of the uniform vertical distribution of the H+ ions.

Abstract translation: 在制造半导体时，将DBARC层沉积在晶片上以防止反射。 光致抗蚀剂层沉积在DBARC层上，并且晶片被选择性地暴露于照射下。 照射在光致抗蚀剂和DBARC的曝光区域中产生光酸（H +离子）。 为了在DBARC中为微特征提供更好的分辨率，在后曝光烘烤（PEB）之前或期间，通过涂覆的晶片垂直产生电场，以通过DBARC产生H +离子的均匀垂直分布。 然后将涂覆的晶片展开以除去DBARC的未曝光部分或曝光部分。 由显影剂形成的空腔由于H +离子的均匀垂直分布而具有基本垂直的侧壁。

公开(公告)号：US07341939B2

公开(公告)日：2008-03-11

申请号：US11061056

申请日：2005-02-18

Applicant: Dah-Chung Oweyang ,  Chih-Cheng Lin ,  Hsueh-Liang Hung ,  Bang-Chein Ho

Inventor： Dah-Chung Oweyang ,  Chih-Cheng Lin ,  Hsueh-Liang Hung ,  Bang-Chein Ho

IPC: H01L21/4763

CPC classification number: G03F7/38 ,  G03F7/091 ,  H01L21/0276

Abstract: In the manufacture of a semiconductor, a DBARC layer is deposited upon a wafer to prevent reflection. A photo resist layer is deposited upon the DBARC layer and the wafer is selectively exposed to irradiation. The irradiation generates photo acid (H+ ions) in the exposed areas of the photo resist and DBARC. In order to provide better resolution in the DBARC for micro-features, an electric field is generated vertically through the coated wafer before or during post exposure baking (PEB) to create a uniform vertical distribution of H+ ions though the DBARC. The coated wafer is then developed to remove either the unexposed portions, or exposed portion of the DBARC. The cavities formed by the developer have side walls that are substantially vertical as a result of the uniform vertical distribution of the H+ ions.

Abstract translation: 在制造半导体时，将DBARC层沉积在晶片上以防止反射。 光致抗蚀剂层沉积在DBARC层上，并且晶片被选择性地暴露于照射下。 照射在光致抗蚀剂和DBARC的曝光区域产生光酸（H +离子）。 为了在DBARC中为微特征提供更好的分辨率，在后曝光烘烤（PEB）之前或期间，通过涂覆的晶片垂直产生电场，以通过DBARC产生H +离子的均匀垂直分布。 然后将涂覆的晶片展开以除去DBARC的未曝光部分或曝光部分。 由显影剂形成的空腔由于H +离子的均匀垂直分布而具有基本垂直的侧壁。