CIRCUIT FOR THE DETECTION OF SOLDER-JOINT FAILURES IN A DIGITAL ELECTRONIC PACKAGE
    11.
    发明申请
    CIRCUIT FOR THE DETECTION OF SOLDER-JOINT FAILURES IN A DIGITAL ELECTRONIC PACKAGE 失效
    用于检测数字电子包装中的焊接失败的电路

    公开(公告)号:US20090160457A1

    公开(公告)日:2009-06-25

    申请号:US12360046

    申请日:2009-01-26

    IPC分类号: G01R31/02

    摘要: The solder-joint integrity of digital electronic packages, such as FPGAs or microcontrollers that have internally connected input/output buffers, is evaluated by applying a time-varying voltage through one or more solder-joint networks to charge a charge-storage component. Each network includes an I/O buffer on the die in the package and a solder-joint connection, typically one or more such connections inside the package and between the package and a board. The time constant for charging the component is proportional to the resistance of the solder-joint network, hence the voltage across the charge-storage component is a measurement of the integrity of the solder-joint network.

    摘要翻译: 数字电子封装(例如具有内部连接的输入/输出缓冲器的微控制器)的焊接完整性通过通过一个或多个焊点网络施加时变电压来对电荷存储部件进行充电来评估。 每个网络包括在封装中的管芯上的I / O缓冲器和焊接接头,通常在封装内部以及封装与板之间的一个或多个这样的连接。 用于对部件充电的时间常数与焊点网络的电阻成比例,因此电荷存储部件两端的电压是测量焊点网络的完整性。

    Method and circuit for the detection of solder-joint failures in a digital electronic package
    12.
    发明授权
    Method and circuit for the detection of solder-joint failures in a digital electronic package 失效
    用于检测数字电子封装中焊点故障的方法和电路

    公开(公告)号:US07501832B2

    公开(公告)日:2009-03-10

    申请号:US11325076

    申请日:2006-01-04

    IPC分类号: G01R31/02

    摘要: The solder-joint integrity of digital electronic packages, such as FPGAs or microcontrollers that have internally connected input/output buffers, is evaluated by applying a time-varying voltage through one or more solder-joint networks to charge a charge-storage component. Each network includes an I/O buffer on the die in the package and a solder-joint connection, typically one or more such connections inside the package and between the package and a board. The time constant for charging the component is proportional to the resistance of the solder-joint network, hence the voltage across the charge-storage component is a measurement of the integrity of the solder-joint network.

    摘要翻译: 数字电子封装(例如具有内部连接的输入/输出缓冲器的微控制器)的焊接完整性通过通过一个或多个焊点网络施加时变电压来对电荷存储部件进行充电来评估。 每个网络包括在封装中的管芯上的I / O缓冲器和焊接接头,通常在封装内部以及封装与板之间的一个或多个这样的连接。 用于对部件充电的时间常数与焊点网络的电阻成比例,因此电荷存储部件两端的电压是测量焊点网络的完整性。

    Method and resistive bridge circuit for the detection of solder-joint failures in a digital electronic package
    13.
    发明授权
    Method and resistive bridge circuit for the detection of solder-joint failures in a digital electronic package 失效
    用于检测数字电子封装中焊点故障的方法和电阻桥式电路

    公开(公告)号:US07196294B2

    公开(公告)日:2007-03-27

    申请号:US11350446

    申请日:2006-02-09

    IPC分类号: H05B1/02

    摘要: A solder-joint detection circuit uses a resistive bridge and a differential detector to detect faults in the solder-joint network both inside and outside the digital electronic package during operation. The resistive bridge is preferably coupled to a high supply voltage used to power the package. Resistors R1 and R2 are connected in series at a first junction between the high and low supply voltages and a resistor R3 is coupled to the high supply voltage and connected in series with the resistance of the solder-network at a second junction. The network is held at a low voltage on the die. The detector compares the sensitivity and detection voltages and outputs a Pass/Fail signal for the solder-joint network.

    摘要翻译: 焊接检测电路使用电阻桥和差分检测器来检测数字电子封装内部和外部的焊点网络中的故障。 电阻桥优选地耦合到用于为封装供电的高电源电压。 电阻器R 1和R 2在高电源电压和低电源电压之间的第一连接处串联连接,并且电阻器R 3耦合到高电源电压并且在第二连接处与焊料网络的电阻串联连接。 网络在模具上保持低电压。 检测器比较灵敏度和检测电压,并输出焊点网络的通过/失败信号。