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11.发明授权Intra-die routing using back side redistribution layer and associated method 有权使用背面再分配层和相关方法进行芯片间路由公开(公告)号：US08319325B2
公开(公告)日：2012-11-27
申请号：US12483878
申请日：2009-06-12
IPC分类号： H01L23/52
CPC分类号： H01L25/0657 , H01L23/481 , H01L23/525 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/16225 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2924/00014 , H01L2924/10253 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A semiconductor die includes: a body portion with a plurality of circuit components, a front side including electrical couplings to the plurality of circuit components, a back side having a redistribution layer with a first electrical terminal coupled to the plurality of circuit components by a first through-silicon via, and a second through-silicon via electrically coupled to a third through-silicon via by a trace on the back side redistribution layer. Also, disclosed is a method of coupling circuit components on a die using through-silicon vias and a back side redistribution layer.
摘要翻译： 半导体管芯包括：具有多个电路部件的主体部分，包括与多个电路部件的电耦合的前侧，具有再分配层的背面，第一电端子通过第一电极部件耦合到多个电路部件 以及第二通硅电路，其通过背侧再分配层上的迹线电耦合到第三穿透硅通孔。 此外，公开了一种使用硅通孔和背面再分布层将电路元件耦合在管芯上的方法。
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12.发明申请公开(公告)号：US20100314737A1
公开(公告)日：2010-12-16
申请号：US12483878
申请日：2009-06-12
CPC分类号： H01L25/0657 , H01L23/481 , H01L23/525 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/16225 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2924/00014 , H01L2924/10253 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A semiconductor die includes: a body portion with a plurality of circuit components, a front side including electrical couplings to the plurality of circuit components, a back side having a redistribution layer with a first electrical terminal coupled to the plurality of circuit components by a first through-silicon via, and a second through-silicon via electrically coupled to a third through-silicon via by a trace on the back side redistribution layer. Also, disclosed is a method of coupling circuit components on a die using through-silicon vias and a back side redistribution layer.
摘要翻译： 半导体管芯包括：具有多个电路部件的主体部分，包括与多个电路部件的电耦合的前侧，具有再分配层的背面，第一电端子通过第一电极部件耦合到多个电路部件 以及第二通硅电路，其通过背侧再分配层上的迹线电耦合到第三穿透硅通孔。 此外，还公开了一种使用硅通孔和背面再分布层将电路元件耦合在管芯上的方法。
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13.发明申请SEMICONDUCTOR WAFER-TO-WAFER BONDING FOR DISSIMILAR SEMICONDUCTOR DIES AND/OR WAFERS 有权用于二极管半导体器件和/或半导体的半导体波形与波形焊接公开(公告)号：US20120276716A1
公开(公告)日：2012-11-01
申请号：US13545393
申请日：2012-07-10
IPC分类号： H01L21/78
CPC分类号： H01L24/94 , H01L21/563 , H01L21/568 , H01L24/16 , H01L24/81 , H01L24/83 , H01L24/96 , H01L24/97 , H01L25/0655 , H01L25/0657 , H01L25/50 , H01L2221/68331 , H01L2221/68377 , H01L2224/04105 , H01L2224/12105 , H01L2224/13025 , H01L2224/13099 , H01L2224/1403 , H01L2224/14051 , H01L2224/14181 , H01L2224/16145 , H01L2224/16148 , H01L2224/32145 , H01L2224/73204 , H01L2224/81193 , H01L2224/81801 , H01L2224/838 , H01L2224/94 , H01L2224/96 , H01L2224/97 , H01L2225/06513 , H01L2225/06541 , H01L2924/01006 , H01L2924/01033 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2924/18162 , H01L2924/18165 , H01L2224/81 , H01L2924/00 , H01L2224/11 , H01L2224/83
摘要： A process for wafer-to-wafer bonding of a first wafer having a first set of dies of a first die size to a reconstituted wafer of a second set of dies having a second die size different than the first die size. The process includes aligning the second set of dies such that a second set of interconnects on the second set of dies aligns with a first set of interconnects on the first set of dies. The second set of dies includes a spacing between the second set of dies based on parameters of the first set of dies. The process also includes coupling the reconstituted wafer with the first wafer to create a wafer stack.
摘要翻译： 一种用于将具有第一模具尺寸的第一组模具的第一晶片与第二组模具的重构晶片的第二晶片接合的工艺，其具有不同于第一模具尺寸的第二模具尺寸。 该过程包括对齐第二组模具，使得第二组模具上的第二组互连对齐于第一组模具上的第一组互连。 第二组模具基于第一组模具的参数包括第二组模具之间的间隔。 该方法还包括将重构的晶片与第一晶片耦合以产生晶片叠层。
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