公开(公告)号：US11449337B1

公开(公告)日：2022-09-20

申请号：US16721791

申请日：2019-12-19

Applicant: CADENCE DESIGN SYSTEMS, INC.

Inventor： Mitchell Poplack ,  Yuhei Hayashi

IPC: G06F9/30 ,  G06F9/455

Abstract: A pseudorandom logic circuit may be embedded as a hardware within an emulation system, which may generate pseudorandom keephot instructions. A masking logic may mask out portions in each pseudorandom keephot instruction, which may change state elements during execution. A cluster of emulation processors may execute masked pseudorandom keephot instructions to consume power when not executing mission instructions. The cluster of emulation processors may run keephot cycles, during which the cluster of emulation processors may execute the pseudorandom keephot instructions causing the cluster of emulation processors to continue consuming a roughly constant amount of power, either at a same or different voltage level, but supposed outputs of the pseudorandom keephot instructions may have no impact upon inputs and outputs generated during mission cycles.

公开(公告)号：US11243856B1

公开(公告)日：2022-02-08

申请号：US16217465

申请日：2018-12-12

Applicant: CADENCE DESIGN SYSTEMS, INC.

Inventor： Yuhei Hayashi ,  Mitchell G. Poplack

IPC: G06F11/22 ,  G06F11/273 ,  G06F30/331 ,  G06F9/455 ,  H04L29/08

Abstract: Using a framing protocol, an application specific integrated circuit (ASIC) in an emulation system may transmit a start-of-packet molecule to a serializer-deserializer (SerDes) interface of a switching ASIC in a gap cycle leading up to an emulation cycle such that the switching ASIC may start routing mission data through the SerDes interface during the emulation cycle. The ASIC may transmit an end-of-packet molecule at a first gap cycle to the SerDes interface of the switching ASIC such that the switching ASIC may stop routing data through the SerDes interface during the gap cycles. The start-of-packet molecule may include a start-of-packet word, a status word, cyclic redundancy check word, and an idle word. The end-of-packet molecule may include an end-of-packet word, a status word, a cyclic redundancy check word, and an idle word.

公开(公告)号：US11106846B1

公开(公告)日：2021-08-31

申请号：US16208431

申请日：2018-12-03

Applicant: CADENCE DESIGN SYSTEMS, INC.

Inventor： Mitchell G. Poplack ,  Yuhei Hayashi

IPC: G06F30/30 ,  G06F30/33 ,  G06F30/327 ,  G06F115/10

Abstract: A compaction circuit in an emulation system may store in a data array emulation data that may be read in subsequent emulation steps. For each emulation step, the compaction circuit may receive keeptags from a local control store word of the emulation step and store portions of emulation data identified by the keeptags. The keeptags in the control store words may be inserted by a compiler based upon whether a corresponding read port of emulation processor reads the stored data in the subsequent steps. The compaction circuit may also translate the logical read address of the stored data to a physical read address in the shared data array. A dynamic modification engine may enable dynamic modification of netlists while using the compacted data array. In response to a request, the dynamic modification engine may modify one or more keeptags and update read addresses in the control store words.

公开(公告)号：US10386909B1

公开(公告)日：2019-08-20

申请号：US15279251

申请日：2016-09-28

Applicant: CADENCE DESIGN SYSTEMS, INC.

Inventor： Mitchell G. Poplack ,  Yuhei Hayashi

IPC: G06F3/00 ,  G06F1/3203 ,  G06F9/455 ,  G06F9/30 ,  G06F9/54 ,  G06F17/50

Abstract: Disclosed herein are systems and methods to generate, by a compiling processor, one or more sets of one or more execution instructions responsive to compiling a netlist file. The method further includes storing, by the compiling processor, a set of execution instructions into an instruction memory of an execution processor. The method further includes generating, by a compiling processor, a set of one or more keephot instructions for the execution processor based upon the set of execution instructions stored into the instruction memory of the execution processor. The method further includes storing, by a compiling processor, the set of keephot instructions into the instruction memory of the execution processor.

公开(公告)号：US10324740B1

公开(公告)日：2019-06-18

申请号：US14854813

申请日：2015-09-15

Applicant: CADENCE DESIGN SYSTEMS, INC.

Inventor： Mitchell G. Poplack ,  Yuhei Hayashi

IPC: G06F9/455

Abstract: A control-circuit of an emulation system may include one or more serial link inputs communicatively coupled to a serial bus, a serial link input receiving an input control bit from the serial bus. A configurable logic circuit may be configured to receive multiple control bits from the one or more serial link inputs, execute one or more operations on the plurality of input control bits according to programmable logic, and transmit an output control bit to a serial output link.

公开(公告)号：US09910810B1

公开(公告)日：2018-03-06

申请号：US14921424

申请日：2015-10-23

Applicant: CADENCE DESIGN SYSTEMS, INC.

Inventor： Mitchell G. Poplack ,  Yuhei Hayashi ,  Beshara Elmufdi

IPC: G06F13/00 ,  G06F13/40 ,  G06F13/42

CPC classification number: G06F13/4068 ,  G06F13/4282

Abstract: Systems and methods of emulating application-specific integrated circuits using multiple execution phases, where different inputs and outputs are used or produced by components of the emulation system are disclosed. For example, an OMUX may select and transmit different data over a serial bus based on the execution phase of the emulator system. In another example, a processor or cluster may capture outputted data during a first execution phase, execute instructions for a second execution phase, and then return to the capture outputted data for further processing during a next cycle of the first execution phase.