公开(公告)号：US09767888B1

公开(公告)日：2017-09-19

申请号：US15396046

申请日：2016-12-30

Applicant: Cadence Design Systems, Inc.

Inventor： Hari Anand Ravi ,  Thomas Evan Wilson ,  Balbeer Singh Rathor

IPC: G11C5/06 ,  G11C11/4094 ,  G11C11/4091 ,  G11C11/4074 ,  H03F3/45 ,  H03K17/687

CPC classification number: H03K17/6872 ,  G11C11/4074 ,  G11C11/4093 ,  G11C29/022 ,  G11C29/023 ,  G11C29/028 ,  H03F3/3022 ,  H03F3/45179 ,  H03F2203/30006 ,  H03F2203/45344

Abstract: Embodiments relate to systems, methods and computer-readable media to enable design and creation of receiver circuitry. One embodiment is a receiver apparatus comprising a first resistor connected to a first receiver input, four N-type metal oxide semiconductor (NMOS) field effect transistors (FETs), two PMOS FETS, and a trans-impedance amplifier wherein an input terminal of the trans-impedance amplifier is connected to a drain terminal of the second NMOS FET. Additional embodiments including other circuitry, associated methods, and media comprising instructions associated with generation of circuit design files are also described.