Abstract:
Embodiments of the present disclosure relate to liquid crystal displays (LCDs) and electronic devices incorporating LCDs having an organic passivation layer positioned between edge-sealed two substrates. Specifically, embodiments of the present disclosure employ lithographic techniques (e.g., a half-tone mask, diffractive exposure mask, etc.) to remove or not deposit a portion of the organic passivation layer near the edges of the substrates prior to sealing the substrates along these edges. As described herein, this reduction in the thickness of the organic layer near the edges of the device may improve the strength of the edge seal due to reduced strain in the organic layer.
Abstract:
Embodiments of the present disclosure relate to liquid crystal displays (LCDs) and electronic devices incorporating LCDs having an organic passivation layer positioned between edge-sealed two substrates. Specifically, embodiments of the present disclosure employ lithographic techniques (e.g., a half-tone mask, diffractive exposure mask, etc.) to remove or not deposit a portion of the organic passivation layer near the edges of the substrates prior to sealing the substrates along these edges. As described herein, this reduction in the thickness of the organic layer near the edges of the device may improve the strength of the edge seal due to reduced strain in the organic layer.
Abstract:
A system for displaying images is provided. A capacitor type digital-to-analog converter is coupled between a first node and a second node and generates a first analog signal according to a digital signal with N bit data. An analogue buffer is coupled between the second node and a third node and generates a second analog signal according to the first analog signal and a bias voltage. A first switch is coupled between a predetermined voltage and the second node. A second switch is coupled between the first node and the third node. A third switch is coupled between the third node and an analog output signal. The second switch is turned on and the third switch is turned off when the first switch is turned on, and the first and second switches are turned off when the third switch is turned on.
Abstract:
Common electrodes (Vcom) of integrated touch screens can be segmented into electrically isolated Vcom portions that can be operated as drive lines and/or sense lines of a touch sensing system. The touch screen can include high-resistivity connections between Vcom portions. The resistivity of the high-resistivity connections can be high enough so that touch sensing and image display can be performed by the touch screen, and the high-resistivity connections can provide an added functionality by allowing a charge build up on one of the Vcom portions to be spread to other Vcom portions and/or discharged from system by allowing charge to leak through the high-resistivity connections. In this way, for example, visual artifacts that result from charge build up on a Vcom portion can be reduced or eliminated.
Abstract:
Disclosed embodiments relate to signal routings for use in a display device. The display device may include a liquid crystal display (LCD) panel having multiple pixels arranged in rows and columns. Each of the pixels includes a pixel electrode and a thin-film transistor (TFT). The LCD may include a conductive signal routing portion having a first metallic layer, a second metallic layer formed directly on the first metallic layer, and a third metallic layer formed directly on the second metallic layer. The first metallic layer may include a contact terminal. The second metallic layer when combined with the third metallic layers may decrease the resistance of the third metallic layer.
Abstract:
The antenna on hand held devices, such as the iPhone or iPad, can be subject to interference from other circuitry on the device. Such interference may come from high frequency switching of nearby display circuitry, such as de-multiplexors or other circuits. To address this issue, the switching rates may be slowed in certain circuits by adding resistance and/or capacitance, thus raising the RC time constant and slowing the switching times to reduce the high frequency components. Alternatively or in addition to, an EMI shield can be placed over some or all of the display driving circuitry to shield the antenna from high frequency interference.
Abstract:
A display may have a thin-film-transistor layer with a substrate layer. A layer of dielectric may be formed on the substrate layer and may have an upper surface and a lower surface. The thin-film-transistor layer may include an array of display pixels. Data lines and gate lines may provide signals to the display pixels. Gate driver circuitry in an inactive peripheral portion of the display may include a gate driver circuit for each gate line. The gate driver circuits may include thin-film transistors that are formed on the upper surface of the layer of dielectric. Signal lines such as a gate low line, a gate routing line coupled between the gate driver circuits, and a common electrode line may be formed from two or more layers of metal to reduce their widths or may be embedded within the dielectric layer between the upper and lower surfaces under the thin-film transistors.
Abstract:
Methods and devices for shielding displays from electrostatic discharge (ESD) are provided. In one example, a display of an electronic device may include a high resistivity shielding layer configured to protect electrical components from static charges. The display may also include a conductive layer electrically coupled to the high resistivity shielding layer and configured to decrease a discharge time of static charges from the high resistivity shielding layer. The display may include a grounding layer and a conductor electrically coupled between the conductive layer and the grounding layer to direct static charges from the conductive layer to the grounding layer.
Abstract:
A gate signal adjustment circuit for a display is disclosed. The gate signal adjustment circuit can adjust a transition time of a gate signal used to drive data displaying. The adjustment can be to either speed up or slow down the transition time according to the requirements of the display. In an example, the gate signal adjustment circuit can include multiple transistors, where a first set of the transistors outputs the gate signal and a second set of the transistors outputs an adjustment to the gate signal. The second set of transistors can be the same or different sizes depending on the desirable number of adjustment options. The circuit can also include a control line coupled to the second set of transistors to control the adjustment output. Gate signal adjustment can reduce crosstalk in the display.
Abstract:
A source-follower-type analogue buffer with an active load, a new compensating operation and a display with the source-follower-type analogue buffers are developed to reduce an error voltage which is the difference between an input voltage and an output voltage of the analogue buffer. The source-follower type analogue buffer can also minimize the variation from both the charging time and the device characteristics and maximize the range of the input voltage.