Breast augmentation device
    11.
    发明授权
    Breast augmentation device 失效
    乳房增大装置

    公开(公告)号:US5522892A

    公开(公告)日:1996-06-04

    申请号:US411506

    申请日:1995-03-28

    Applicant: Chin-Lung Lin

    Inventor: Chin-Lung Lin

    Abstract: A breast augmentation device made from flexible rubber, having a breast-shaped front part and a hollow, rounded rear part for covering over the breast, wherein the rear part has a plurality of elongated grooves with vent holes and a plurality of elongated ribs, each elongated groove having at least one end perpendicularly connected to the periphery of the orifice of the hollow, rounded rear part, each elongated rib having a center portion and two opposite ends extended from the center portion and perpendicularly connected to the periphery of the orifice, the height of each elongated rib reducing gradually from the respective center portion toward the respective opposite ends.

    Abstract translation: 一种由柔性橡胶制成的隆胸装置,其具有乳房形前部和用于覆盖在乳房上的中空的圆形后部,其中后部具有多个具有通气孔和多个细长肋条的细长槽, 细长槽具有至少一个端部垂直地连接到中空的圆形后部的孔口的周边,每个细长肋条具有中心部分,两个相对端部从中心部分延伸并且垂直地连接到孔口的周边, 每个细长肋的高度从相应的中心部分朝着相应的相对端逐渐减小。

    Light-emitting diode light module free of jumper wires
    12.
    发明授权
    Light-emitting diode light module free of jumper wires 失效
    发光二极管灯模块无跳线

    公开(公告)号:US08587001B2

    公开(公告)日:2013-11-19

    申请号:US13371993

    申请日:2012-02-13

    CPC classification number: H01L25/0753 H01L33/52 H01L2924/0002 H01L2924/00

    Abstract: An LED light module free of jumper wires has a substrate and multiple LED chips. The substrate has a positive side circuit, a negative side circuit, multiple first chip connection portions and multiple second connection portions. The first and second chip connection portions are respectively connected to the positive and negative side circuits, and are juxtaposedly and alternately arranged on the substrate so that a width between each first chip connection portion and a corresponding second chip connection portion is smaller than a width of each LED chip. Each LED chip can be directly mounted on corresponding first and second chip connection portions to electrically connect to the positive and negative side circuits. Accordingly, jumper wires for connecting the LED chips and the positive and negative side circuits can be removed to avoid broken jumper wires occurring when the LED light module is shipped or assembled.

    Abstract translation: 没有跳线的LED灯模块有一个基板和多个LED芯片。 基板具有正侧电路,负侧电路,多个第一芯片连接部分和多个第二连接部分。 第一和第二芯片连接部分分别连接到正侧电路和负侧电路,并且并置并交替地布置在基板上,使得每个第一芯片连接部分和相应的第二芯片连接部分之间的宽度小于 每个LED芯片。 每个LED芯片可以直接安装在相应的第一和第二芯片连接部分上,以电连接到正极和负极侧电路。 因此,可以去除用于连接LED芯片和正极侧和负极侧电路的跨接线,以避免当发光或组装LED灯模块时发生断线跳线。

    OPTICAL PROXIMITY CORRECTION METHOD, OPTICAL PROXIMITY CORRECTION MASK AND CONDUCTIVE LINE STRUCTURE
    13.
    发明申请
    OPTICAL PROXIMITY CORRECTION METHOD, OPTICAL PROXIMITY CORRECTION MASK AND CONDUCTIVE LINE STRUCTURE 审中-公开
    光学近似校正方法,光学近似校正掩模和导电线结构

    公开(公告)号:US20070141477A1

    公开(公告)日:2007-06-21

    申请号:US11306168

    申请日:2005-12-19

    CPC classification number: G03F1/36

    Abstract: An optical proximity correction method is described. A photomask pattern including multiple line patterns arranged in an end-to-end manner is provided. An initial correction step is conducted to add an end pattern at each of the two ends of each line pattern. Then, a fine correction step is conducted to correct the line patterns and the end patterns. Each end pattern is an asymmetric pattern, and the two end patterns between two adjacent line patterns are in a mirror-symmetric or point-symmetric arrangement.

    Abstract translation: 描述了一种光学邻近校正方法。 提供包括以端对端布置的多个线图案的光掩模图案。 进行初始校正步骤以在每个线图案的两端的每一端添加端部图案。 然后,进行精细校正步骤以校正线条图案和结束图案。 每个端部图案是不对称图案,并且两个相邻线图案之间的两个端部图案是镜像对称或点对称布置。

    PHASE SHIFT MASK FOR PATTERNING ULTRA-SMALL HOLE FEATURES
    14.
    发明申请
    PHASE SHIFT MASK FOR PATTERNING ULTRA-SMALL HOLE FEATURES 审中-公开
    相位移动面板用于绘制超小型孔特征

    公开(公告)号:US20070020531A1

    公开(公告)日:2007-01-25

    申请号:US11160918

    申请日:2005-07-15

    Applicant: Chin-Lung Lin

    Inventor: Chin-Lung Lin

    CPC classification number: G03F1/29

    Abstract: A phase shift mask includes a light transparent substrate; an opaque material layer coated on the main surface of the light transparent substrate, wherein the opaque material layer has an window opening exposing a light transparent area of the light transparent substrate; a cruciform first phase shifting region of the exposed light transparent area; and a second phase shifting region of the exposed light transparent area except the cruciform first phase shifting region. Light passing through the cruciform first phase shifting region has a phase shift of 180 degrees relative to light passing through the d second phase shifting region.

    Abstract translation: 相移掩模包括光透明基板; 涂覆在所述透光基板的主表面上的不透明材料层,其中所述不透明材料层具有暴露所述透光基板的透光区域的窗口; 暴露的光透明区域的十字形第一相移区域; 以及除了十字形第一相移区域之外的曝光光透射区域的第二相移区域。 通过十字形第一相移区域的光相对于通过d秒相移区域的光具有180度的相移。

    Optical proximity correction method

    公开(公告)号:US06598218B2

    公开(公告)日:2003-07-22

    申请号:US09741622

    申请日:2000-12-19

    Applicant: Chin-Lung Lin

    Inventor: Chin-Lung Lin

    CPC classification number: G03F1/36

    Abstract: An optical proximity correction method that uses additional corner serifs or hammerhead pattern to correct and avoid pull up of ends in a main pattern. These corner serifs are set such that the main pattern is corrected with only a slight line-end width expansion and line-end approaching the original design in length. Since the optical proximity correction method is able to correct the main pattern so that the end approaches the original design after a photo-exposure, any misalignment that may lead to uncompleted contact or an open of metallic interconnects can be avoided. Furthermore, the slightly expanded end permits a higher process window in the fabrication of metallic interconnects.

    Method for selective PSM with assist OPC
    16.
    发明授权
    Method for selective PSM with assist OPC 有权
    用辅助OPC选择性PSM的方法

    公开(公告)号:US06406819B1

    公开(公告)日:2002-06-18

    申请号:US09469009

    申请日:1999-12-21

    Applicant: Chin-Lung Lin

    Inventor: Chin-Lung Lin

    CPC classification number: G03F1/30 G03F1/36

    Abstract: A phase shift mask for photolithography used in fabricating integrated circuits is disclosed. The mask comprises a transparent plate and a first opaque film formed on said transparent plate, which has a first pattern defining a main feature region. The first pattern is then imaged onto a photoresist layer coated on a wafer for the integrated circuits. The present invention further comprises at least one phase shift region formed on said transparent plate to correspond to an active region of the wafer, in which the phase shift region is used to improve optical scattering effect of the first pattern through the active region while performing the photolithography. Moreover, the present invention comprises at least one second opaque film formed on said transparent plate to correspond to a non-active region of the wafer, in which each has at least one second pattern used to improve optical scattering effect of the first pattern through the non-active region while performing the photolithography. The second pattern is located alongside and separated from the first pattern of the opaque film, and wherein the second pattern is then imaged onto the wafer with the phase shift region and the first pattern.

    Abstract translation: 公开了用于制造集成电路的光刻用相移掩模。 掩模包括透明板和形成在所述透明板上的第一不透明膜,其具有限定主要特征区域的第一图案。 然后将第一图案成像到用于集成电路的涂覆在晶片上的光致抗蚀剂层。 本发明还包括形成在所述透明板上的至少一个相移区域,以对应于晶片的有源区域,其中使用相移区域来改善通过有源区域的第一图案的光散射效应,同时执行 光刻。 此外,本发明包括形成在所述透明板上的至少一个第二不透明膜,以对应于晶片的非有源区域,其中每个具有至少一个第二图案,用于改善通过第一图案的光散射效应 非活性区域,同时进行光刻。 第二图案位于不透明膜的第一图案的旁边并与之隔开,并且其中第二图案然后用相移区域和第一图案成像到晶片上。

    Half-tone phase shift mask for fabrication of poly line
    17.
    发明授权
    Half-tone phase shift mask for fabrication of poly line 有权
    用于制造多线的半色调相移掩模

    公开(公告)号:US06312856B1

    公开(公告)日:2001-11-06

    申请号:US09455720

    申请日:1999-12-07

    Applicant: Chin-Lung Lin

    Inventor: Chin-Lung Lin

    CPC classification number: G03F1/32 G03F1/36

    Abstract: A half-tone phase shift mask is formed from the composite structure of a mask substrate and a half-tone phase shifting layer. The half-tone phase shifting layer induces a 180° phase shift to light passing through the mask. The half tone phase shifting layer further includes a main pattern having a first width and a first length, and an assist feature having a second width and a second length. The assist feature is parallel to the main pattern and disposed at both sides of the main pattern while being separated therefrom by a distance. Using deep ultraviolet light as the exposure source, a wafer scale of the first width is about 0.1-0.15 &mgr;m, a wafer scale of the second width is about 0.055-0.09 &mgr;m and the distance between the main pattern and the assist feature is about 0.22-0.27 &mgr;m.

    Abstract translation: 半色调相移掩模由掩模基板和半色调相移层的复合结构形成。 半色调相移层对通过掩模的光线引起180°的相移。 半色调相移层还包括具有第一宽度和第一长度的主图案以及具有第二宽度和第二长度的辅助特征。 辅助特征与主图案平行,并且设置在主图案的两侧,同时与主图案分离一段距离。 使用深紫外光作为曝光源,第一宽度的晶片尺度为约0.1-0.15μm,第二宽度的晶片尺度为约0.055-0.09μm,主图案与辅助特征之间的距离为约0.22μm -0.27妈妈

    Reticle having assist feature between semi-dense lines
    18.
    发明授权
    Reticle having assist feature between semi-dense lines 有权
    标线具有半密集线之间的辅助特征

    公开(公告)号:US06303252B1

    公开(公告)日:2001-10-16

    申请号:US09470635

    申请日:1999-12-27

    Applicant: Chin-Lung Lin

    Inventor: Chin-Lung Lin

    CPC classification number: G03F1/36

    Abstract: A reticle having an assist feature between semi-dense lines is described. The reticle has two adjacent, substantially parallel, and substantially equally spaced line segments of which each representing a portion of a main feature having a line width, between two adjacent line segments of the group having a gap space, wherein the gap-space/line-width ratio is equal to about 3-6.5. Between the two adjacent line segments, at least one inside assist feature is located. At the outside edges of the extreme left-hand and right-hand line segments, two outside assist features are located, respectively, wherein each of the two assist features has a first width and is spaced apart from the nearest line segment by a distance.

    Abstract translation: 描述了具有半致密线之间的辅助特征的掩模版。 标线具有两个相邻的,基本上平行的和基本上等间距的线段,其中每个线段表示具有间隙空间的组的两个相邻线段之间的具有线宽的主要部分的一部分,其中间隙空间/线 宽度比等于约3-6.5。 在两个相邻线段之间,定位至少一个内部辅助特征。 在极左侧和右侧线段的外侧边缘分别设有两个外部辅助功能,其中两个辅助部件中的每一个具有第一宽度并且与最近的线段间隔一定距离。

    Method of automatically forming a rim phase shifting mask
    19.
    发明授权
    Method of automatically forming a rim phase shifting mask 有权
    自动形成轮辋相移掩模的方法

    公开(公告)号:US06291112B1

    公开(公告)日:2001-09-18

    申请号:US09191762

    申请日:1998-11-13

    CPC classification number: G03F1/29

    Abstract: A method of automatically forming a rim PSM is provided. A first pattern comprising a conventional original pattern as a blinding layer and assist features around the conventional circuit pattern is designed. A portion of a Cr film and a portion of a phase shifting layer under the Cr film are removed with the first pattern. The removed portion of the Cr film and the removed portion of the phase shifting layer are positioned on the assist feature. A second pattern comprising the conventional circuit pattern and a half of the assist features is designed. A portion of the Cr film in positions other than on the second pattern is removed. The convention circuit pattern formed at the mask medium is defined as the blinding layer. The area of the assist features only comprise a quartz substrate that light can pass through. The other areas of the mask medium wherein the phase shifting layer remains is defined as the phase-shifting portion of the PSM.

    Abstract translation: 提供了一种自动形成边缘PSM的方法。 设计了包括常规原始图案作为盲目层并且围绕常规电路图案的辅助特征的第一图案。 利用第一图案除去Cr膜的一部分和在Cr膜下面的部分相移层。 Cr膜的去除部分和移相层的去除部分位于辅助特征上。 设计包括常规电路图案和辅助特征的一半的第二图案。 除去在第二图案之外的位置中的Cr膜的一部分。 形成在掩模介质上的常规电路图形被定义为盲目层。 辅助特征的区域仅包括光可以通过的石英衬底。 其中相移层保留的掩模介质的其它区域被定义为PSM的相移部分。

    Method for forming a pattern with both logic-type and memory-type circuit
    20.
    发明授权
    Method for forming a pattern with both logic-type and memory-type circuit 有权
    用逻辑型和存储型电路形成图案的方法

    公开(公告)号:US06251564B1

    公开(公告)日:2001-06-26

    申请号:US09312968

    申请日:1999-05-17

    CPC classification number: G03F7/70466 G03F7/203

    Abstract: A method for forming a pattern with both a logic-type and, a memory-type circuit is disclosed. The method includes first providing a wafer which includes a photoresist layer, then covering the photoresist layer with a first mask including an opaque area and a first pattern area. Forming a first pattern on the photoresist layer by a first exposure. Covering the photoresist layer with a second mask after the first mask is removed. Moreover, a second pattern is printed on the photoresist layer by a second exposure. Finally, the second mask is removed. The double-exposure method will enhance the resolution of the pattern defined on the photoresist layer.

    Abstract translation: 公开了一种用于形成具有逻辑类型和存储器型电路的图案的方法。 该方法包括首先提供包括光致抗蚀剂层的晶片,然后用包括不透明区域和第一图案区域的第一掩模覆盖光致抗蚀剂层。 通过第一次曝光在光致抗蚀剂层上形成第一图案。 在去除第一掩模之后用第二掩模覆盖光致抗蚀剂层。 此外,通过第二曝光将第二图案印刷在光致抗蚀剂层上。 最后,删除第二个掩码。 双曝光方法将增强在光致抗蚀剂层上限定的图案的分辨率。

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