SYSTEM AND METHOD FOR DOWNBOUND I/O EXPANSION REQUEST AND RESPONSE PROCESSING IN A PCIe ARCHITECTURE
    13.
    发明申请
    SYSTEM AND METHOD FOR DOWNBOUND I/O EXPANSION REQUEST AND RESPONSE PROCESSING IN A PCIe ARCHITECTURE 有权
    PCIe架构中的DOWNBOUND I / O扩展请求和响应处理的系统和方法

    公开(公告)号:US20110320675A1

    公开(公告)日:2011-12-29

    申请号:US12821242

    申请日:2010-06-23

    IPC分类号: G06F13/36

    摘要: A system for implementing non-standard I/O adapters in a standardized I/O architecture, the system comprising an I/O hub communicatively coupled to an I/O bus and at least one I/O adapter, the I/O hub including logic for implementing a method, the method comprising receiving a request to perform an operation on the I/O adapter from a requester at a requester address, the I/O adapter at a destination address, determining that the request is in a format other than a format supported by the I/O bus, the I/O bus expecting a requester identifier at a first location in a header of the request, reformatting the request into the format supported by the I/O bus, the reformatting comprising storing the requester address, the destination address and an operation code at the first location in the header of the reformatted request, and sending the reformatted request to the I/O adapter.

    摘要翻译: 一种用于在标准I / O架构中实现非标准I / O适配器的系统,该系统包括通信地耦合到I / O总线和至少一个I / O适配器的I / O集线器,所述I / O集线器包括 用于实现方法的逻辑,所述方法包括从请求者地址的请求者接收对所述I / O适配器执行操作的请求,所述I / O适配器在目的地地址处,确定所述请求是不是 I / O总线支持的格式,I / O总线期望在请求的头部中的第一位置处的请求者标识符,将请求重新格式化为由I / O总线支持的格式,重新格式化包括存储请求者 地址,目的地地址和重新格式化请求的头部中第一个位置的操作代码,并将重新格式化的请求发送到I / O适配器。

    INPUT/OUTPUT (I/O) EXPANSION RESPONSE PROCESSING IN A PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIE) ENVIRONMENT
    14.
    发明申请
    INPUT/OUTPUT (I/O) EXPANSION RESPONSE PROCESSING IN A PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIE) ENVIRONMENT 有权
    外围组件互连(PCIE)环境中的输入/输出(I / O)扩展响应处理

    公开(公告)号:US20110320666A1

    公开(公告)日:2011-12-29

    申请号:US12821239

    申请日:2010-06-23

    IPC分类号: G06F13/00

    摘要: A system for implementing non-standard input/output (I/O) adapters in a standardized I/O architecture, comprising an I/O hub communicatively coupled to an I/O bus and a plurality of I/O adapters, the I/O hub including logic for implementing a method comprising receiving a request from a requester to perform an operation on one of the plurality of I/O adapters. The method further comprising determining that the request is in a format other than a format supported by the I/O bus, determining that the requester requires a completion response for the request, transforming the request into the format supported by the I/O bus, transmitting the request to the I/O adapter, receiving the completion response from the I/O adapter, the completion response comprising an indicator that the request has been completed, the completion response in the format supported by the I/O bus and transmitting the completion response to the requester.

    摘要翻译: 一种用于在标准I / O架构中实现非标准输入/输出(I / O)适配器的系统,包括通信地耦合到I / O总线和多个I / O适配器的I / O集线器,I / O集线器,包括用于实现方法的逻辑,该方法包括从请求者接收对所述多个I / O适配器之一执行操作的请求。 该方法还包括确定该请求是不同于I / O总线支持的格式的格式,确定请求者需要该请求的完成响应,将该请求转换成该I / O总线支持的格式, 将所述请求发送到所述I / O适配器,从所述I / O适配器接收完成响应,所述完成响应包括所述请求已经完成的指示符,所述完成响应以所述I / O总线支持的格式发送, 完成响应请求者。

    Scalable I/O adapter function level error detection, isolation, and reporting
    15.
    发明授权
    Scalable I/O adapter function level error detection, isolation, and reporting 有权
    可扩展的I / O适配器功能级错误检测,隔离和报告

    公开(公告)号:US08645767B2

    公开(公告)日:2014-02-04

    申请号:US12821247

    申请日:2010-06-23

    IPC分类号: G06F11/00

    摘要: Embodiments of the invention relate to scalable input/output (I/O) function level error detection, isolation, and reporting. An error is detected in a communication initiated between a function and the system memory, the communication including an I/O request from an application. Future communication between the function and the system memory is prevented in response to the detecting. The application is notified that the error in communication occurred in response to the detecting.

    摘要翻译: 本发明的实施例涉及可伸缩输入/输出(I / O)功能级错误检测,隔离和报告。 在功能和系统存储器之间发起的通信中检测到错误,该通信包括来自应用的I / O请求。 响应于检测,防止功能和系统存储器之间的未来通信。 通知应用程序响应于检测发生通信中的错误。

    Non-standard I/O adapters in a standardized I/O architecture
    16.
    发明授权
    Non-standard I/O adapters in a standardized I/O architecture 有权
    标准I / O架构中的非标准I / O适配器

    公开(公告)号:US08615622B2

    公开(公告)日:2013-12-24

    申请号:US12821242

    申请日:2010-06-23

    IPC分类号: G06F13/36 G06F13/40

    摘要: A system for implementing non-standard I/O adapters in a standardized I/O architecture, the system comprising an I/O hub communicatively coupled to an I/O bus and at least one I/O adapter, the I/O hub including logic for implementing a method, the method comprising receiving a request to perform an operation on the I/O adapter from a requester at a requester address, the I/O adapter at a destination address, determining that the request is in a format other than a format supported by the I/O bus, the I/O bus expecting a requester identifier at a first location in a header of the request, reformatting the request into the format supported by the I/O bus, the reformatting comprising storing the requester address, the destination address and an operation code at the first location in the header of the reformatted request, and sending the reformatted request to the I/O adapter.

    摘要翻译: 一种用于在标准I / O架构中实现非标准I / O适配器的系统,该系统包括通信地耦合到I / O总线和至少一个I / O适配器的I / O集线器,所述I / O集线器包括 用于实现方法的逻辑,所述方法包括从请求者地址的请求者接收对所述I / O适配器执行操作的请求,所述I / O适配器在目的地地址处,确定所述请求是不是 I / O总线支持的格式,I / O总线期望在请求的头部中的第一位置处的请求者标识符,将请求重新格式化为由I / O总线支持的格式,重新格式化包括存储请求者 地址,目的地地址和重新格式化请求的头部中第一个位置的操作代码,并将重新格式化的请求发送到I / O适配器。

    Input/output (I/O) expansion response processing in a peripheral component interconnect express (PCIe) environment
    17.
    发明授权
    Input/output (I/O) expansion response processing in a peripheral component interconnect express (PCIe) environment 有权
    在外围组件互连快速(PCIe)环境中的输入/输出(I / O)扩展响应处理

    公开(公告)号:US08918573B2

    公开(公告)日:2014-12-23

    申请号:US12821239

    申请日:2010-06-23

    IPC分类号: G06F13/20 G06F13/40

    摘要: Embodiments of the invention relate to optimizing EDRAM refresh rates in a high performance cache architecture. A request is received from a requester to perform an operation on an I/O adapters. It is determined if the request is in a format other than a format supported by an I/O bus and if, the requester requires a completion response for the request. The request is transformed into the format supported by the I/O bus and is transmitted to the I/O adapter. The completion response is received from the I/O adapter, and includes an indicator that the request has been completed. The completion response is in the format supported by the I/O bus and is transmitted to the requester.

    摘要翻译: 本发明的实施例涉及在高性能高速缓存架构中优化EDRAM刷新率。 从请求者接收到对I / O适配器执行操作的请求。 确定请求是否是不同于I / O总线支持的格式的格式,如果请求者需要请求的完成响应。 该请求被转换为I / O总线支持的格式,并被传送到I / O适配器。 从I / O适配器接收到完成响应,并包括一个指示符,表示请求已经完成。 完成响应采用I / O总线支持的格式,并传送到请求者。

    System and method for routing I/O expansion requests and responses in a PCIE architecture
    18.
    发明授权
    System and method for routing I/O expansion requests and responses in a PCIE architecture 有权
    用于在PCIE架构中路由I / O扩展请求和响应的系统和方法

    公开(公告)号:US08745292B2

    公开(公告)日:2014-06-03

    申请号:US12821245

    申请日:2010-06-23

    摘要: A system for implementing non-standard input/output (I/O) adapters in a standardized I/O architecture, comprising an I/O hub communicatively coupled to an I/O bus and a plurality of I/O adapters at I/O adapter addresses, the I/O hub including logic for implementing a method comprising receiving requests from the plurality of I/O adapters, storing the I/O adapter addresses of a requester along with their corresponding target recipient addresses and operation codes, receiving a response from a responder, the response indicating that a request has been completed, determining that the response is in a format other than a format supported by the I/O bus, transforming the response into the format supported by the I/O bus, locating a stored I/O adapter address having a corresponding target recipient address that matches the responder address and a corresponding operation code that matches the responder operation code, and transmitting the response to the stored I/O adapter address.

    摘要翻译: 一种用于在标准I / O架构中实现非标准输入/输出(I / O)适配器的系统,包括通信地耦合到I / O总线的I / O集线器和多个I / O适配器 适配器地址,I / O集线器包括用于实现包括接收来自多个I / O适配器的请求的方法的逻辑,存储请求者的I / O适配器地址及其对应的目标接收方地址和操作码,接收响应 来自响应者的响应指示请求已经完成,确定响应是不同于I / O总线支持的格式的格式,将响应转换成I / O总线支持的格式,定位 具有与响应者地址相匹配的相应目标接收方地址的存储I / O适配器地址和与响应者操作码匹配的对应操作码,并将该响应发送到存储的I / O适配器地址。

    SYSTEM AND METHOD FOR ROUTING I/O EXPANSION REQUESTS AND RESPONSES IN A PCIE ARCHITECTURE
    19.
    发明申请
    SYSTEM AND METHOD FOR ROUTING I/O EXPANSION REQUESTS AND RESPONSES IN A PCIE ARCHITECTURE 有权
    在PCIE架构中路由I / O扩展请求和响应的系统和方法

    公开(公告)号:US20110320653A1

    公开(公告)日:2011-12-29

    申请号:US12821245

    申请日:2010-06-23

    IPC分类号: G06F13/12 G06F13/00

    摘要: A system for implementing non-standard input/output (I/O) adapters in a standardized I/O architecture, comprising an I/O hub communicatively coupled to an I/O bus and a plurality of I/O adapters at I/O adapter addresses, the I/O hub including logic for implementing a method comprising receiving requests from the plurality of I/O adapters, storing the I/O adapter addresses of a requester along with their corresponding target recipient addresses and operation codes, receiving a response from a responder, the response indicating that a request has been completed, determining that the response is in a format other than a format supported by the I/O bus, transforming the response into the format supported by the I/O bus, locating a stored I/O adapter address having a corresponding target recipient address that matches the responder address and a corresponding operation code that matches the responder operation code, and transmitting the response to the stored I/O adapter address.

    摘要翻译: 一种用于在标准I / O架构中实现非标准输入/输出(I / O)适配器的系统,包括通信地耦合到I / O总线的I / O集线器和多个I / O适配器 适配器地址,I / O集线器包括用于实现包括接收来自多个I / O适配器的请求的方法的逻辑,存储请求者的I / O适配器地址及其对应的目标接收方地址和操作码,接收响应 来自响应者的响应指示请求已经完成,确定响应是不同于I / O总线支持的格式的格式,将响应转换成I / O总线支持的格式,定位 存储的I / O适配器地址具有与响应者地址匹配的对应目标接收方地址和与响应者操作码相匹配的对应操作码,并将响应发送到存储的I / O适配器地址。

    Upbound input/output expansion request and response processing in a PCIe architecture
    20.
    发明授权
    Upbound input/output expansion request and response processing in a PCIe architecture 有权
    PCIe架构中的上行输入/输出扩展请求和响应处理

    公开(公告)号:US08645606B2

    公开(公告)日:2014-02-04

    申请号:US12821243

    申请日:2010-06-23

    IPC分类号: G06F13/36

    CPC分类号: G06F13/385

    摘要: Embodiments of the invention relate to upbound input/output expansion requests and response processing in a PCIE architecture. A first request to perform an operation on a host system is intitiated. The first request is formatted for the first protocol and includes data that is required in order to process the first request. A second request is created in response to the first request, the second request includes a header and is formatted according to the second protocol. The data required to process the first request in the header of the second request is stored, and the second request is sent to the host system.

    摘要翻译: 本发明的实施例涉及PCIE架构中的上行输入/输出扩展请求和响应处理。 在主机系统上执行操作的第一个请求被拒绝。 第一个请求被格式化为第一个协议,并包括为处理第一个请求所需的数据。 响应于第一请求创建第二请求,第二请求包括头部,并且根据第二协议进行格式化。 存储处理第二请求的报头中的第一请求所需的数据,并将第二请求发送到主机系统。