Method for performing dual mode image rejection calibration in a receiver
    11.
    发明申请
    Method for performing dual mode image rejection calibration in a receiver 有权
    在接收机中执行双模式镜像抑制校准的方法

    公开(公告)号:US20060111071A1

    公开(公告)日:2006-05-25

    申请号:US11227797

    申请日:2005-09-15

    CPC classification number: H04B1/30 H04B17/21

    Abstract: A method is disclosed for performing dual mode image rejection calibration in a receiver. A first image correction factor is acquired (1302) for use in a receiver system (15) using a first known signal associated with a first signal band during a startup mode. The first image correction factor is adjusted incrementally (1310) during a normal operation mode. A radio frequency (RF) signal associated with the first signal band is received (1324) using the first image correction factor during the normal operation mode.

    Abstract translation: 公开了一种用于在接收机中执行双模式拒绝校准的方法。 在启动模式期间,使用与第一信号频带相关联的第一已知信号,在接收机系统(15)中获取第一图像校正因子(1302)。 在正常操作模式期间,第一图像校正因子被逐渐调整(1310)。 在正常操作模式期间,使用第一图像校正因子接收与第一信号频带相关联的射频(RF)信号(1324)。

    Wireless communication system and method using clock swapping during image rejection calibration

    公开(公告)号:US20060128338A1

    公开(公告)日:2006-06-15

    申请号:US11340941

    申请日:2006-01-27

    CPC classification number: H04B1/28 H04B17/21

    Abstract: A wireless communication receiver is disclosed that operates in a test mode to determine image correction information that is used to suppress undesired image signals when the receiver switches to a normal operational mode. In one embodiment, the receiver includes a frequency synthesizer coupled by a quadrature divider to an in-phase (I) mixer and a quadrature mixer. The mixers are coupled by respective analog to digital converters (ADCs) to respective I and Q channel inputs of a digital signal processor (DSP). In the test mode, a test tone is provided to the mixer inputs. The test tone is divided down further and provided to clock the frequency synthesizer, the ADCs and the DSP. This configuration locks together the mixers, frequency synthesizer, ADCs and DSP ratiometrically in frequency during the test mode while image correction information is being determined. When the receiver switches to a normal operating mode, the frequency synthesizer, ADCs and DSP are clocked by a main clock signal instead of the divided down test tone, and the test tone is removed from the mixers.

    Matching I and Q portions of a device
    14.
    发明申请
    Matching I and Q portions of a device 审中-公开
    匹配设备的I和Q部分

    公开(公告)号:US20060045202A1

    公开(公告)日:2006-03-02

    申请号:US10930709

    申请日:2004-08-31

    CPC classification number: H03D7/166

    Abstract: In one embodiment, the present invention includes a frequency divider that has an I channel to provide an I channel phase; and a Q channel to provide a Q channel phase, in which the I and the Q channels are mirrored with respect to an axis therebetween. The axis may also be substantially coincident with a center axis of a device incorporating the frequency divider, such as a transceiver.

    Abstract translation: 在一个实施例中,本发明包括具有I信道以提供I信道相位的分频器; 以及提供Q通道相位的Q通道,其中I通道和Q通道相对于它们之间的轴线被镜像。 该轴线也可以与包含分频器的装置(例如收发器)的中心轴线基本一致。

    SYSTEM AND METHOD FOR BIASING ELECTRICAL CIRCUITS
    15.
    发明申请
    SYSTEM AND METHOD FOR BIASING ELECTRICAL CIRCUITS 失效
    用于偏置电路的系统和方法

    公开(公告)号:US20050212585A1

    公开(公告)日:2005-09-29

    申请号:US10810039

    申请日:2004-03-26

    CPC classification number: H03F1/301 H03B5/04

    Abstract: A bias system is disclosed including a calibration bus to which a controller, a reference bias source, a master bias source, and first and second slave bias sources are coupled. The controller varies a control code sent over the calibration bus to the master bias source until a particular control code is found that causes the bias signal of the master bias source to equal a desired bias value which is provided by the reference bias source. The controller then sends the particular control code to the first and second slave bias sources to cause the first and second slave bias sources to generate a bias signal having the same desired bias value as the master bias source. Isolation between load circuits coupled to the first and second bias sources is thus enhanced while providing low noise, stable operation

    Abstract translation: 公开了一种偏置系统,其包括校准总线,控制器,参考偏置源,主偏置源以及第一和第二从属偏置源耦合到校准总线。 控制器将通过校准总线发送的控制代码改变为主偏置源,直到找到导致主偏置源的偏置信号等于由参考偏置源提供的期望偏置值的特定控制代码。 然后,控制器将特定控制码发送到第一和第二从属偏置源,以使第一和第二从属偏置源产生具有与主偏置源相同的期望偏置值的偏置信号。 因此,耦合到第一和第二偏置源的负载电路之间的隔离增强,同时提供低噪声,稳定的操作

    Wireless communication system and method using digital calibration to control mixer input swing
    17.
    发明申请
    Wireless communication system and method using digital calibration to control mixer input swing 审中-公开
    无线通信系统和方法采用数字校准来控制混频器的输入摆幅

    公开(公告)号:US20070060070A1

    公开(公告)日:2007-03-15

    申请号:US11263449

    申请日:2005-10-31

    CPC classification number: H04B1/40

    Abstract: A wireless communication device is disclosed wherein the voltage swing of a local oscillator (LO) signal is controlled to prevent overstressing semiconductor devices in a mixer to which the LO signal is supplied. A quadrature divider supplies the LO signal to the mixer. Digital calibration methodology controls the current that the quadrature divider draws from a power supply to set the voltage swing of the LO signal that the quadrature divider generates.

    Abstract translation: 公开了一种无线通信设备,其中控制本地振荡器(LO)信号的电压摆幅以防止在提供LO信号的混频器中的过应力半导体器件。 正交分频器将LO信号提供给混频器。 数字校准方法控制正交分压器从电源吸取的电流,以设置正交分压器产生的LO信号的电压摆幅。

    Wireless communication system and method using clock swapping during image rejection calibration

    公开(公告)号:US20060111072A1

    公开(公告)日:2006-05-25

    申请号:US11263450

    申请日:2005-10-31

    CPC classification number: H04B1/10 H04B1/28

    Abstract: A wireless communication receiver is disclosed that operates in a test mode to determine image correction information that is used to suppress undesired image signals when the receiver switches to a normal operational mode. In one embodiment, the receiver includes a frequency synthesizer coupled by a quadrature divider to an in-phase (I) mixer and a quadrature mixer. The mixers are coupled by respective analog to digital converters (ADCs) to respective I and Q channel inputs of a digital signal processor (DSP). In the test mode, a test tone is provided to the mixer inputs. The test tone is divided down further and provided to clock the frequency synthesizer, the ADCs and the DSP. This configuration locks together the mixers, frequency synthesizer, ADCs and DSP ratiometrically in frequency during the test mode while image correction information is being determined. When the receiver switches to a normal operating mode, the frequency synthesizer, ADCs and DSP are clocked by a main clock signal instead of the divided down test tone, and the test tone is removed from the mixers.

    Chopped Intermediate Frequency Wireless Receive
    19.
    发明申请
    Chopped Intermediate Frequency Wireless Receive 有权
    斩波中频无线接收

    公开(公告)号:US20070178870A1

    公开(公告)日:2007-08-02

    申请号:US11733735

    申请日:2007-04-10

    Applicant: Donald Kerth

    Inventor: Donald Kerth

    CPC classification number: H04B1/0007 H04B1/28

    Abstract: A chopped intermediate frequency (IF) wireless receiver is disclosed. The wireless receiver includes a local oscillator (LO), a first and a second mixers, an LO frequency control module, an IF filter, a digital down converter and a down conversion controller. The LO provides a local oscillating signal to the first and second mixers. The first and second mixers converts a received radio frequency signal to an in-phase IF signal and a quadrature IF signal, respectively. The LO frequency control module alternately down converts a channel frequency by changing an oscillation frequency of the LO. Coupled to the digital down converter, the down conversion controller adjusts a complex sine wave within the digital down converter while the in-phase IF signal and the quadrature IF signal are being down-converted by the digital down converter to a baseband signal.

    Abstract translation: 公开了一种斩波中频(IF)无线接收机。 无线接收机包括本地振荡器(LO),第一和第二混频器,LO频率控制模块,IF滤波器,数字下变频器和下变频控制器。 LO向第一和第二混合器提供本地振荡信号。 第一和第二混频器分别将接收到的射频信号转换成同相IF信号和正交IF信号。 LO频率控制模块通过改变LO的振荡频率来交替地下变频通道频率。 耦合到数字下变频器,下变频控制器调整数字下变频器内的复正弦波,同时IF信号和正交IF信号由数字下变频器下变频为基带信号。

    System and method for reducing spurious emissions in a wireless communication device including a testing apparatus
    20.
    发明申请
    System and method for reducing spurious emissions in a wireless communication device including a testing apparatus 审中-公开
    一种用于在包括测试装置的无线通信设备中减少杂散发射的系统和方法

    公开(公告)号:US20070099586A1

    公开(公告)日:2007-05-03

    申请号:US11264631

    申请日:2005-11-01

    CPC classification number: H04M1/24

    Abstract: A wireless communication device is disclosed wherein isolation buffers couple to respective active circuits or stages of the device to convey test information regarding such active circuits to a test data line from which status information may be collected. The communication device operates in two modes, namely a normal operational mode wherein the isolation buffers effectively short spurious emissions from the active circuits to a ground, and a test mode wherein the isolation-buffers may convey test information from a selected active circuit to the test data line. The isolation buffers prevent spurious emissions from escaping the active circuits to which they are coupled and prevent spurious emissions from traveling from active circuit to active circuit over the test data line throughout the wireless device.

    Abstract translation: 公开了一种无线通信设备,其中隔离缓冲器耦合到设备的相应有效电路或级,以将关于这种有源电路的测试信息传送到可以从其收集状态信息的测试数据线。 通信设备以两种模式工作,即正常操作模式,其中隔离缓冲器有效地将有源电路的杂散发射短路到地,以及测试模式,其中隔离缓冲器可以将测试信息从所选择的有效电路传送到测试 数据线。 隔离缓冲器防止杂散发射从它们耦合到的有源电路中逸出,并防止杂散发射通过整个无线设备的测试数据线从有源电路传播到有源电路。

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