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公开(公告)号：US09209912B2
公开(公告)日：2015-12-08
申请号：US12621050
申请日：2009-11-18
CPC分类号： H04B15/04 , H04B2215/064 , H04B2215/065 , H04L7/0045 , H04L7/0091
摘要： Embodiments include circuit devices and methods for re-clocking an input signal. In an embodiment, a circuit device includes a data storage element having a data input to receive a digital data stream having a first clock rate and including a clock input to receive a clock signal having a second clock rate. The data storage element further includes logic to adjust edge timing of transitions within the digital data stream based on the clock signal to produce a modulated output signal having a power spectrum with spectral nulls at a desired frequency and its harmonics without changing an average data rate.
摘要翻译： 实施例包括用于对输入信号进行重新计时的电路装置和方法。 在一个实施例中，电路设备包括具有数据输入的数据存储元件，用于接收具有第一时钟速率的数字数据流并且包括时钟输入以接收具有第二时钟速率的时钟信号。 数据存储元件还包括基于时钟信号来调整数字数据流内的转换的边沿定时的逻辑，以产生具有在期望频率下具有频谱零点的功率谱的调制输出信号及其谐波而不改变平均数据速率。
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2.发明申请Integrating Components In A Radio Tuner Integrated Circuit (IC) For A Tracking Filter 有权用于跟踪滤波器的无线电调谐器集成电路（IC）中的组件集成公开(公告)号：US20130244600A1
公开(公告)日：2013-09-19
申请号：US13892917
申请日：2013-05-13
申请人： Dan B. Kasha , Jing Li , Russell Croman , Michael Johnson , Scott D. WIllingham
发明人： Dan B. Kasha , Jing Li , Russell Croman , Michael Johnson , Scott D. WIllingham
IPC分类号： H04B1/16
CPC分类号： H04B1/1638 , H03J3/08 , H04B1/18
摘要： In one embodiment, the present invention includes a method for configuring a single chip radio tuner having a configurable front end, which may be adapted within an integrated circuit (IC). The method may include setting a controller of the tuner with configuration information for a radio in which the tuner is located. Then, control signals responsive to the configuration information can be sent to the configurable front end to configure the tuner.
摘要翻译： 在一个实施例中，本发明包括用于配置具有可配置前端的单芯片无线电调谐器的方法，其可以在集成电路（IC）内适配。 该方法可以包括使用调谐器所在的无线电的配置信息来设置调谐器的控制器。 然后，响应于配置信息的控制信号可以被发送到可配置的前端来配置调谐器。
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3.发明授权Antenna diversity system with multiple tuner circuits having multiple operating modes and methods 有权具有多个调谐器电路的天线分集系统具有多种操作模式和方法公开(公告)号：US08331887B2
公开(公告)日：2012-12-11
申请号：US12650166
申请日：2009-12-30
申请人： George Tyson Tuttle , Younes Djadi , Russell Croman , Scott Thomas Haban , Javier Elenes , Lokesh Duraiappah
发明人： George Tyson Tuttle , Younes Djadi , Russell Croman , Scott Thomas Haban , Javier Elenes , Lokesh Duraiappah
CPC分类号： H04B7/0682 , H04L25/03866
摘要： In an embodiment, a tuner circuit includes an inter-chip receiver circuit configurable to couple to a first inter-chip communication link to receive a first data stream and includes an analog-to-digital converter configured to convert a radio frequency signal into a digital version of the radio frequency signal. The tuner circuit further includes a digital signal processor coupled to the inter-chip receiver circuit and the analog-to-digital converter. The digital signal processor is configurable to generate an output signal related to at least one of the first data stream and the digital version of the radio frequency signal based on a selected operating mode.
摘要翻译： 在一个实施例中，调谐器电路包括可配置为耦合到第一芯片间通信链路以接收第一数据流的芯片间接收器电路，并且包括被配置为将射频信号转换为数字 版本的射频信号。 调谐器电路还包括耦合到芯片间接收器电路和模数转换器的数字信号处理器。 数字信号处理器可配置为基于所选择的操作模式生成与第一数据流和数字版本的数字版本中的至少一个相关的输出信号。
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4.发明授权Systems and methods for controlling integrated circuit operation with below ground pin voltage 有权用低于地脚电压控制集成电路运行的系统和方法公开(公告)号：US08184488B2
公开(公告)日：2012-05-22
申请号：US12592240
申请日：2009-11-20
申请人： Mike R. May , Russell Croman
发明人： Mike R. May , Russell Croman
IPC分类号： G11C16/04
CPC分类号： G11C29/46 , G11C5/143 , G11C17/146 , G11C17/165 , G11C17/18
摘要： Systems and methods for controlling operation of an integrated circuit by applying below ground voltage to one or more pins of the integrated circuit, and in which the application of a below ground pin voltage may be employed as an initiator of (or condition for) a given mode of circuit operation in a manner that prevents the inadvertent initiation of the given mode of operation that may otherwise occur due to accidental application of an above ground voltage to one or more pins of the integrated circuit.
摘要翻译： 通过向集成电路的一个或多个引脚施加低于地电压的控制集成电路的操作的系统和方法，并且其中施加低于接地引脚电压的可以用作给定的（或）条件的引发者 电路操作的模式，以防止由于将集成电路的一个或多个引脚意外地施加上述地电压而导致的给定操作模式的意外启动。
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公开(公告)号：US07031683B2
公开(公告)日：2006-04-18
申请号：US10083633
申请日：2002-02-26
申请人： G. Diwakar Vishakhadatta , Donald A. Kerth , Russell Croman , Jeffrey W. Scott , Richard T. Behrens , G. Tyson Tuttle , Vishnu S. Srinivasan
发明人： G. Diwakar Vishakhadatta , Donald A. Kerth , Russell Croman , Jeffrey W. Scott , Richard T. Behrens , G. Tyson Tuttle , Vishnu S. Srinivasan
IPC分类号： H04B1/26
CPC分类号： H04B1/0003 , H04B1/28 , H04B1/406 , H04B15/02 , H04B15/04 , H04B2215/064
摘要： A calibration circuitry includes an adjustable capacitor, a voltage generator, a reference voltage generator, and a controller. The reference voltage generator provides a reference voltage. The voltage generator provides a measurement voltage that depends on the capacitance of the adjustable capacitor. The capacitance of the adjustable capacitor varies in response to a control signal. The controller provides the control signal based on the relative values of the reference voltage and the measurement voltage.
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公开(公告)号：US06946898B1
公开(公告)日：2005-09-20
申请号：US10810039
申请日：2004-03-26
摘要： A bias system is disclosed including a calibration bus to which a controller, a reference bias source, a master bias source, and first and second slave bias sources are coupled. The controller varies a control code sent over the calibration bus to the master bias source until a particular control code is found that causes the bias signal of the master bias source to equal a desired bias value which is provided by the reference bias source. The controller then sends the particular control code to the first and second slave bias sources to cause the first and second slave bias sources to generate a bias signal having the same desired bias value as the master bias source. Isolation between load circuits coupled to the first and second bias sources is thus enhanced while providing low noise, stable operation.
摘要翻译： 公开了一种偏置系统，其包括校准总线，控制器，参考偏置源，主偏置源以及第一和第二从属偏置源耦合到校准总线。 控制器将通过校准总线发送的控制代码改变为主偏置源，直到找到导致主偏置源的偏置信号等于由参考偏置源提供的期望偏置值的特定控制代码。 然后，控制器将特定控制码发送到第一和第二从属偏置源，以使第一和第二从属偏置源产生具有与主偏置源相同的期望偏置值的偏置信号。 因此，耦合到第一和第二偏置源的负载电路之间的隔离增强，同时提供低噪声，稳定的操作。
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公开(公告)号：US08538365B2
公开(公告)日：2013-09-17
申请号：US13249508
申请日：2011-09-30
申请人： Russell Croman , Christopher S. Gregg , Dan B. Kasha , Michael R. May , John Khoury , Javier Elenes
发明人： Russell Croman , Christopher S. Gregg , Dan B. Kasha , Michael R. May , John Khoury , Javier Elenes
IPC分类号： H04B1/10
CPC分类号： H04W52/0238 , H04B1/06 , H04W52/0245 , Y02D70/40
摘要： In one embodiment, a method includes receiving and processing an incoming radio frequency (RF) signal in a receiver. Based on this signal, an environmental noise level can be determined, where this level corresponds to environmental noise present in an environment in which the receiver is located. Then, if the environmental noise level is substantially greater than receiver-generated noise, power consumption of at least one analog front end component of the receiver can be reduced.
摘要翻译： 在一个实施例中，一种方法包括在接收机中接收和处理输入射频（RF）信号。 基于该信号，可以确定环境噪声电平，其中该电平对应于存在于接收器所处的环境中的环境噪声。 然后，如果环境噪声电平显着大于接收器产生的噪声，则可以减少接收机的至少一个模拟前端部件的功耗。
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8.发明授权Integrating components in a radio tuner integrated circuit (IC) for a tracking filter 有权将组件集成在用于跟踪滤波器的无线电调谐器集成电路（IC）中公开(公告)号：US08463215B2
公开(公告)日：2013-06-11
申请号：US12649011
申请日：2009-12-29
申请人： Dan B. Kasha , Jing Li , Russell Croman , Michael Johnson , Scott D. Willingham
发明人： Dan B. Kasha , Jing Li , Russell Croman , Michael Johnson , Scott D. Willingham
IPC分类号： H04B1/18
CPC分类号： H04B1/1638 , H03J3/08 , H04B1/18
摘要： In one embodiment, the present invention includes a method for configuring a single chip radio tuner having a configurable front end, which may be adapted within an integrated circuit (IC). The method may include setting a controller of the tuner with configuration information for a radio in which the tuner is located. Then, control signals responsive to the configuration information can be sent to the configurable front end to configure the tuner.
摘要翻译： 在一个实施例中，本发明包括用于配置具有可配置前端的单芯片无线电调谐器的方法，其可以在集成电路（IC）内适配。 该方法可以包括使用调谐器所在的无线电的配置信息来设置调谐器的控制器。 然后，响应于配置信息的控制信号可以被发送到可配置的前端来配置调谐器。
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9.发明申请ANTENNA DIVERSITY SYSTEM WITH MULTIPLE TUNER CIRCUITS HAVING MULTIPLE OPERATING MODES AND METHODS 有权具有多种操作模式和方法的多个调谐器电路的天线多样性系统公开(公告)号：US20110158339A1
公开(公告)日：2011-06-30
申请号：US12650166
申请日：2009-12-30
申请人： George Tyson Tuttle , Younes Djadi , Russell Croman , Scott Thomas Haban , Javier Elenes , Lokesh Duraiappah
发明人： George Tyson Tuttle , Younes Djadi , Russell Croman , Scott Thomas Haban , Javier Elenes , Lokesh Duraiappah
CPC分类号： H04B7/0682 , H04L25/03866
摘要： In an embodiment, a tuner circuit includes an inter-chip receiver circuit configurable to couple to a first inter-chip communication link to receive a first data stream and includes an analog-to-digital converter configured to convert a radio frequency signal into a digital version of the radio frequency signal. The tuner circuit further includes a digital signal processor coupled to the inter-chip receiver circuit and the analog-to-digital converter. The digital signal processor is configurable to generate an output signal related to at least one of the first data stream and the digital version of the radio frequency signal based on a selected operating mode.
摘要翻译： 在一个实施例中，调谐器电路包括可配置为耦合到第一芯片间通信链路以接收第一数据流的芯片间接收器电路，并且包括被配置为将射频信号转换为数字 版本的射频信号。 调谐器电路还包括耦合到芯片间接收器电路和模数转换器的数字信号处理器。 数字信号处理器可配置为基于所选择的操作模式生成与第一数据流和数字版本的数字版本中的至少一个相关的输出信号。
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公开(公告)号：US20110115537A1
公开(公告)日：2011-05-19
申请号：US12621050
申请日：2009-11-18
IPC分类号： H03K5/12
CPC分类号： H04B15/04 , H04B2215/064 , H04B2215/065 , H04L7/0045 , H04L7/0091
摘要： Embodiments include circuit devices and methods for re-clocking an input signal. In an embodiment, a circuit device includes a data storage element having a data input to receive a digital data stream having a first clock rate and including a clock input to receive a clock signal having a second clock rate. The data storage element further includes logic to adjust edge timing of transitions within the digital data stream based on the clock signal to produce a modulated output signal having a power spectrum with spectral nulls at a desired frequency and its harmonics without changing an average data rate.
摘要翻译： 实施例包括用于对输入信号进行重新计时的电路装置和方法。 在一个实施例中，电路设备包括具有数据输入的数据存储元件，用于接收具有第一时钟速率的数字数据流并且包括时钟输入以接收具有第二时钟速率的时钟信号。 数据存储元件还包括基于时钟信号来调整数字数据流内的转换的边沿定时的逻辑，以产生具有在期望频率下具有频谱零点的功率谱的调制输出信号及其谐波而不改变平均数据速率。
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