摘要:
First and second slotlines are mounted on an electrically insulating substrate having a planar face with a connection region. Each slotline has first and second, spaced-apart coplanar conductors that extend into the connection region. A fifth, ground conductor, also mounted on the substrate face, is spaced from and coplanar with the first and second slotlines and has a proximal portion in the connection region. A chip circuit includes first and second field-effect transistors (FETs) flip mounted in the connection region to all five conductors. The gates of the FETs are connected to the first slotline for receiving an input signal. The drains are connected to the second slotline for outputting the signal amplified by the transistors. The sources of the FETs are connected to the fifth conductor. This general configuration can be modified for use as an amplifier, oscillator, frequency multiplier or mixer. The slotline may divide into parallel slotline portions for providing plural circuits in parallel with distributed impedance matching. A slotline may loop back from the connection region to provide a choice for impedance matching, and a portion of the fifth conductor may extend between slotline conductors to provide capacitive coupling.
摘要:
A high frequency circuit structure including a base substrate having a planar face, a first base slotline mounted on the base substrate face and consisting of first and second, spaced-apart coplanar base conductors, and a circuit chip flip-mounted on the base substrate. The circuit chip include a chip substrate having a planar face facing the planar face of the base substrate. A slotline resident on the chip is flip mounted onto the base slotline. Input and output connections made according to the invention can be used to provide connections to an intermediate circuit resident on either the chip or the base substrate. A second chip slotline may be electrically in series or parallel with the first chip slotline.
摘要:
Mixers assemblies including mixer cells, baluns, quadrature mixers and image reject mixers, etc. The mixer cell may contain CPW strip RF input and slot line strip LO input. LO signal return is provided through a flip-chip mounted to a mixer contact area and the CPW RF input is preferably coupled to the contact area through a distributed or flip-chip mounted capacitor. The use of two mixer cells in novel embodiments of quadrature and image reject mixers is disclosed. CPW to slot line power dividing baluns for use within and without such mixers are also disclosed.
摘要:
A process of connecting a plurality of essentially identical active devices is presented for the purpose of multifunction and multiple function operation. These devices, mounted on a chip, are flip-mounted to a circuit motherboard having large passive elements. A push-pull amplifier is presented as an example in which the multiple function operation is the combining of amplifiers whose active devices are on a single chip. The electromagnetic coupling, impedance matching and signal transmission are variously provided by the use of striplines, slotlines, coplanar waveguides, and a slotline converted into a coplanar waveguide.
摘要:
An asymmetric reentrant power coupler suitable for microwave and millimeter bands that includes k input terminals, a plurality of m output terminals, where m is greater than k, and a network coupling the k input terminals to the m output terminals, the network defining n signal paths, where n is greater that m. An input coupler divides an input signal into at least two signal paths. An output coupler recombines a fraction less than one of the divided input signal for propagation to an output terminal. A portion of the non-recombined input signal is propagated to another output terminal. The reentrant coupler may be implemented using Wilkinson, ring, branched line or other coupler types. Couplers that are generally planar as well as coupler that are non-planar are presented.
摘要:
A means of connecting a plurality of essentially identical active devices is presented for the purpose of multifunction and multiple function operation. These devices, mounted on a chip, are flip-mounted onto a circuit formed on a base substrate and having large passive elements. Push-pull amplifiers are presented as examples in which the multiple function operation is the combining of amplifiers whose active devices are on a single chip. Electromagnetic coupling, impedance matching and signal transmission are variously provided by the use of strip lines, slotlines, coplanar waveguides, and a slotline converted into a coplanar waveguide.
摘要:
A means of connecting a plurality of essentially identical active devices is presented for the purpose of multifunction and multiple function operation. These devices, mounted on a chip, are flip-mounted to a circuit motherboard having large passive elements. A push-pull amplifier is presented as an example in which the multiple function operation is the combining of amplifiers whose active devices are on a single chip. The electromagnetic coupling, impedance matching and signal transmission are variously provided by the use of striplines, slotlines, coplanar waveguides, and a slotline converted into a coplanar waveguide.
摘要:
A via termination for a microstrip transmission line formed on a substrate includes a termination resistor that connects an end of the signal conductor to a backside ground plane through a via. Two open-circuit stubs are also formed on the first face of the substrate, one stub on each side of the termination resistor. A compensation resistor on the first face of the substrate connects the end of the signal conductor to each open-circuit stub. The load resistor is equal to the characteristic impedance of the transmission line and the compensation resistors are each equal to twice the characteristic impedance. The combined termination ideally exhibits a real impedance equal to the characteristic impedance over a wide frequency range.
摘要:
First and second spaced-apart planar circuit ground conductors are formed on a base substrate. Multiple stages of an amplifier each have a field effect transistor (FET) flip mounted onto the substrate. A signal-return line couples the sources of the FETs together and functions as a radio frequency (RF) grounds for the amplifier. Direct-current-blocking coplanar couplers couple the amplifier input and output to external circuits. A single voltage supply applies a bias voltage to the drains of the FETs. A source resistance device couples each source terminal to circuit ground. The source resistance devices may be formed of two series-connected resistors. The gate of each FET is coupled to one of the circuit ground conductors through one of the source resistors. The other source resistor thereby provides a gate-to-source voltage for biasing the FET. Alternative embodiments provide a community bias circuit in which signal-return lines of transistors conducting different signals are interconnected and coupled to the bias circuit ground.
摘要:
An oscillator circuit having a flip chip metalization pattern and base substrate metalization pattern is defined such that a common-drain oscillator is configured with the common drain interposed between the source and gate terminals, providing an effective RF common reference with reduced parasitic inductance elements which otherwise degrade oscillator power and phase noise at high frequencies. Multiple sets of such patterns on the substrate and such three-terminal devices on the flip chip are arranged such that conductor patterns on the substrate connecting separately from the gates and the sources of the multiple devices to the common-drain reference are easily configured into separable tuning (or resonator) and feedback circuits. A common-drain oscillator having an interdigitated capacitor coplanar cavity resonator circuit as the gate input circuit having reduced distributed inductance is realized utilizing the interposed common-drain connections provided thereby. Having many small devices, such as FETs, coupled closely together (each having very low parasitic and therefore very high potential operating frequency), the signal power of each adds arithmetically but the noise power adds statistically thereby achieving lower phase noise relative to the combined oscillator signal power. Circuit structures utilizing this invention can provide very large oscillator arrays providing a reduction in phase noise relative to the oscillation signal without having the usual device size limitations.