摘要:
A transposed delay line oscillator including a mode selection filter and a transposed delay line is provided. An output of the transposed delay line is coupled to an input of the mode selection filter to establish an oscillator loop. Based on the transposed delay line output, the mode selection filter generates a mode selection signal including an isolated oscillatory mode, in a Radio Frequency (RF) band. The transposed delay line receives the mode selection signal for transposition to an intermediate frequency of an intermediate frequency (IF) delay line. The IF delay line includes a delay filter and a phase noise suppression loop configured to suppress de-correlated transposition phase noise resulting from a delay of the delay filter. Suppression of phase noise in the IF delay line enables cancellation of transposition phase noise when transposing the IF delay line output to the RF band.
摘要:
The disclosure provided a low noise block converter for converting RF signal received from a satellite into IF signal, where the image rejection of the RF signal is performed in two stages through a low noise amplifier (LNA) integrated circuit (IC). The disclosure reduced the number of discrete components by integrating electronic components onto one integrated circuit (or chip), and at the same, improves the noise figure of the LNB converter. The LNB IC comprises LNA circuits, RF path selector, and signal downconverter, where the image rejection is performed by a combination of the LNA circuits and the signal downconverter.
摘要:
According to an embodiment of the inventive concept, an up-down converter includes a first mixer configured to convert an input radio frequency (RF) signal into an intermediate frequency (IF) signal using a first local signal; an IF filter configured to filter the IF signal converted by the first mixer; a second mixer configured to convert the IF signal, which has been filtered by the IF filter, into an output RF signal using a second local signal; and a local oscillator configured to control a frequency of the first local signal and the second local signal based on a frequency of the input RF signal.
摘要:
Methods and circuitry for calibrating inductive-capacitive resonant circuits are disclosed. An example of the circuitry includes an inductive-capacitive (L-C) resonant circuit operable to receive signals in response to induced electromagnetic signals transmitted on a carrier frequency. A demodulator has a signal source and is operable to demodulate signals generated by the L-C resonant circuit. Switching circuitry is operable to inject signals generated by the signal source into the L-C resonant circuit during a calibration mode. The calibration mode is for adjusting the capacitance in the L-C resonant circuit to tune the L-C resonant circuit to the carrier frequency.
摘要:
A heterodyne receiver structure comprises a frequency conversion block arranged to convert an incoming analog radio frequency (RF) signal to an analog intermediate frequency (IF) signal; a filter block arranged to filter said analog IF signal; and an analog-to-digital (AD) converter block arranged to convert said filtered analog IF signal to a digital signal, wherein the AD converter block (309) is arranged to convert the filtered analog IF signal to the digital signal by using a sampling frequency (fs) which is at least N times a maximum bandwidth of the filtered analog IF signal, wherein the frequency spectrum from zero to the sampling frequency is divided into N frequency zones of equal width, wherein N is an even positive number higher than two; the frequency conversion block (304) is arranged to convert the incoming analog RF signal to the analog IF signal such that the analog IF signal is located in any of the N/2-1 frequency zones having lowest frequency; and the filter block (306-308) is arranged to low pass the analog IF signal such that any disturbing signal located in a zone, which would have a mirror image after the AD conversion in the zone, in which the analog IF signal is located, is filtered away, wherein the heterodyne receiver structure further comprises a digital signal processing block (311) arranged to filter said digital signal.
摘要:
An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver. ESD protection is provided by a pad ring and ESD clamping structure that maintains signal integrity. Also provided are shunts at each pin to discharge ESD build up. The shunts utilize a gate boosting structure to provide sufficient small signal RF performance, and minimal parasitic loading.
摘要:
A signal input into an input terminal 1 is input into mixers 2, 4, and down-converted with local signals having a phase difference of 90 degrees, respectively, whereby an I-signal and a Q-signal are obtained. An output signal from the mixer 4 is delayed 90 degrees in phase by a phase shifter 6. An adder 7 outputs a sum signal of the I-signal and the Q-signal, and a subtracter 8 outputs a subtracted signal between the I-signal and the Q-signal. The sum signal and the subtracted signal are input into band pass filters 9, 10, in which signals in undesired frequency band are cut, then converted into digital signals by AD converters 11, 12 and input into a signal processor 13. In the signal processor 13, a correlation signal of the sum signal and the subtracted signal is formed, and an image signal included in the sum signal is removed using the correlation signal and the subtracted signal.
摘要:
An image rejection quadratic filter is tunable to filter image frequencies over a wide band. In one embodiment, the image rejection filter includes in-phase and quadrature phase mixers. The image rejection has a fractional transfer function. The image rejection filter has two sub-circuits, wherein the first sub-circuit produces the imaginary component of the transfer function, and the second sub-circuit produces the real component of the transfer function. The first sub-circuit receives the Q signal, and the second sub-circuit receives the I signal. In one embodiment, to create the fractional transfer function, a multi-feedback looped integrator is used.
摘要:
A multi-band receiver for receiving an input signal having a frequency situated either in a first band or in a second band. The receiver comprising a mixer for combining an amplified signal having substantially the same frequency as the input signal with a periodical signal generated by a local oscillator. The mixer generates an intermediate frequency signal, the intermediate frequency signal (IF) being inputted to an IF band-pass filter. A central frequency of the band-pass filter is substantially equal to a frequency of the intermediate frequency signal. The receiver is characterized in that the central frequency of the IF band-pass filter is substantially independent of a combining mode of the amplified signal and the periodical signal, the combining mode being selected from an upper heterodyning mode and a lower heterodyning mode.
摘要:
A single conversion frequency converter comprises an image reject mixer and a local oscillator. The local oscillator comprises a variable frequency oscillator and a variable divider. The variable divider supplies to the mixer a local oscillator signal whose frequency is a sub-multiple of the frequency of the variable frequency oscillator.