公开(公告)号：US20180151449A1

公开(公告)日：2018-05-31

申请号：US15361809

申请日：2016-11-28

Applicant: GLOBALFOUNDRIES INC.

Inventor： Rinus T. P. Lee ,  Bharat V. Krishnan ,  Hui Zang ,  Matthew W. Stoker

IPC: H01L21/8238 ,  H01L29/06 ,  H01L29/32 ,  H01L27/092

CPC classification number: H01L21/823821 ,  H01L21/02362 ,  H01L21/823412 ,  H01L21/823807 ,  H01L21/823878 ,  H01L21/8258 ,  H01L27/0924 ,  H01L29/0649 ,  H01L29/32 ,  H01L29/785

Abstract: One aspect of the disclosure is directed to a method of forming a semiconductor structure. The method including: removing each fin in a set of fins from between insulator pillars to expose a portion of a substrate between each insulator pillar, the substrate having a first device region and a second device region; forming a first material over the exposed portions of the substrate between each insulator pillar, the first material including a two-dimensional material; forming a second material over the first material in the first device region, the second material including a first three-dimensional bonding material; and forming a third material over the exposed first material in the second device region, the third material including a second three-dimensional bonding material.

公开(公告)号：US20150214369A1

公开(公告)日：2015-07-30

申请号：US14164934

申请日：2014-01-27

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jody A. Fronheiser ,  Bharat V. Krishnan ,  Murat Kerem Akarvardar ,  Steven Bentley ,  Ajey Poovannummoottil Jacob ,  Jinping Liu

IPC: H01L29/78 ,  H01L29/16 ,  H01L29/66 ,  H01L29/167 ,  H01L29/26 ,  H01L29/04 ,  H01L29/161

CPC classification number: H01L29/7851 ,  H01L29/045 ,  H01L29/0847 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165 ,  H01L29/167 ,  H01L29/26 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

Abstract: One illustrative device disclosed herein includes a fin defined in a semiconductor substrate having a crystalline structure, wherein at least a sidewall of the fin is positioned substantially in a crystallographic direction of the substrate, a gate structure positioned around the fin, an outermost sidewall spacer positioned adjacent opposite sides of the gate structure, and an epi semiconductor material formed around portions of the fin positioned laterally outside of the outermost sidewall spacers in the source/drain regions of the device, wherein the epi semiconductor material has a substantially uniform thickness along the sidewalls of the fin.

Abstract translation: 本文公开的一种说明性器件包括在具有晶体结构的半导体衬底中限定的鳍，其中鳍的至少一个侧壁基本上位于衬底的100°结晶方向，位于鳍周围的栅极结构， 侧壁间隔物，其位于栅极结构的相对侧附近，以及外延半导体材料，其围绕位于器件的源极/漏极区域中的最外侧壁间隔物横向外侧的翅片周围形成，其中外延半导体材料具有基本上均匀的厚度 沿翅片的侧壁。