TRANSMISSION OF ALTERNATIVE CONTENT OVER STANDARD DEVICE CONNECTORS
    11.
    发明申请
    TRANSMISSION OF ALTERNATIVE CONTENT OVER STANDARD DEVICE CONNECTORS 有权
    通过标准设备连接器传输替代内容

    公开(公告)号:US20100109795A1

    公开(公告)日:2010-05-06

    申请号:US12606096

    申请日:2009-10-26

    IPC分类号: H01P1/10

    摘要: Transmission of alternative content over standard device connectors. An embodiment of a method includes connecting a first device to a second device utilizing a standard connector, the connector including multiple pins, and detecting whether the second device is operating in a standard mode or an alternative mode. If the second device is operating in the alternative mode, then switching one or more pins of the standard connector for the alternative mode and transmitting or receiving signals for the alternative mode via the plurality of pins of the standard connector.

    摘要翻译: 通过标准设备连接器传输替代内容。 一种方法的实施例包括使用标准连接器将第一设备连接到第二设备,连接器包括多个引脚,以及检测第二设备是否以标准模式或替代模式操作。 如果第二设备在替代模式下操作,则切换用于替代模式的标准连接器的一个或多个引脚,以及通过标准连接器的多个引脚发送或接收替代模式的信号。

    Reduced dead-cycle, adaptive phase tracking method and apparatus
    13.
    发明授权
    Reduced dead-cycle, adaptive phase tracking method and apparatus 有权
    减少死循环,自适应相位跟踪方法和装置

    公开(公告)号:US07236553B1

    公开(公告)日:2007-06-26

    申请号:US10763905

    申请日:2004-01-23

    IPC分类号: H04L7/00

    CPC分类号: H04L7/0337 H04L7/0008

    摘要: A data sampling method and circuit employing an oversampling clock to oversample a data signal, a phase tracker for use with or in a data sampling circuit, and a method for identifying a sequence of best sampling positions for sampling a data signal from signal samples generated using an oversampling clock. In some embodiments, data indicative of the phase of at least one of the oversampling clock's sampling positions relative to the center of the data eye are low-pass filtered in a manner determined by the data signal's bit rate. In other embodiments, the number of dead cycles of the phase tracker decision loop is reduced by generating possible solutions in parallel and moving the feedback point so as to occur as late as practical, or the phase tracker ignores a sample set when updating its determination of the best sampling position when the sample set indicates that the data signal has less than a predetermined number of transitions during a corresponding tracking period.

    摘要翻译: 使用过采样时钟对数据信号进行过采样的数据采样方法和电路,与数据采样电路一起使用或在数据采样电路中使用的相位跟踪器,以及用于识别最佳采样位置序列的方法,用于从使用 过采样时钟。 在一些实施例中,指示相对于数据眼睛的中心的过采样时钟的采样位置中的至少一个的相位的数据以由数据信号的比特率确定的方式进行低通滤波。 在其他实施例中,相位跟踪器判定循环的死循环的数量通过并行产生可能的解并且将反馈点移动以便尽可能晚地发生而减少,或者当更新其样本集的确定时,相位跟踪器忽略样本集 当样本集合表示在对应的跟踪周期期间数据信号具有小于预定数量的转换时的最佳采样位置。

    Discovery of connections utilizing a control bus
    15.
    发明授权
    Discovery of connections utilizing a control bus 有权
    发现使用控制总线的连接

    公开(公告)号:US08275914B2

    公开(公告)日:2012-09-25

    申请号:US12577707

    申请日:2009-10-12

    IPC分类号: G06F3/00

    CPC分类号: G06F13/4022 G06F13/4081

    摘要: Discovery of connections utilizing a control bus. An embodiment of a method includes detecting a transition of a control bus from a high state to a low state by a source device, the source device being configured to be coupled with a sink device via an interface, the interface including the control bus, the source device including a pullup device and the sink device including a pulldown device; pulsing the control bus to a high state at the source device; and upon detecting by the source device that the control bus remains in the high state ceasing the pulsing of the control bus to the high state, and transitioning the source device from a disconnected state to a connected state.

    摘要翻译: 发现使用控制总线的连接。 一种方法的实施例包括:通过源设备检测控制总线从高状态​​到低状态的转换,源设备被配置为经由接口与宿设备耦合,所述接口包括控制总线, 源设备,包括上拉设备和宿设备,其包括下拉设备; 将控制总线脉冲到源设备处于高状态; 并且当源设备检测到控制总线保持在高状态时,停止控制总线的脉冲到高状态,并且将源设备从断开状态转换到连接状态。

    INTER-PORT COMMUNICATION IN A MULTI-PORT MEMORY DEVICE
    16.
    发明申请
    INTER-PORT COMMUNICATION IN A MULTI-PORT MEMORY DEVICE 有权
    多端口存储器中的端口间通信

    公开(公告)号:US20070234021A1

    公开(公告)日:2007-10-04

    申请号:US11694819

    申请日:2007-03-30

    IPC分类号: G06F7/38

    摘要: A method and system for inter-port communication utilizing a multi-port memory device. The memory device contains an interrupt register, an interrupt signal interface (e.g., a dedicated pin), an interrupt mask, and one or more message buffers associated with each port. When a first component coupled to a first port of the memory device wants to communicate with a second component coupled to a second port of the memory device, the first component writes a message to a message buffer associated with the second port. An interrupt in the input register of the second port is set to notify the second component coupled to the second port that a new message is available. Upon receiving the interrupt, the second component reads the interrupt register to determine the nature of the interrupt. The second component then reads the message from the message buffer.

    摘要翻译: 一种利用多端口存储器件进行端口间通信的方法和系统。 存储器件包含中断寄存器,中断信号接口(例如,专用引脚),中断掩码以及与每个端口相关联的一个或多个消息缓冲器。 当耦合到存储设备的第一端口的第一组件想要与耦合到存储器设备的第二端口的第二组件通信时,第一组件将消息写入与第二端口相关联的消息缓冲器。 第二端口的输入寄存器中的中断被设置为通知耦合到第二端口的第二组件新消息可用。 在接收到中断时,第二个组件读取中断寄存器以确定中断的性质。 然后第二个组件从消息缓冲区读取消息。

    CODING SYSTEM FOR MEMORY SYSTEMS EMPLOYING HIGH-SPEED SERIAL LINKS
    18.
    发明申请
    CODING SYSTEM FOR MEMORY SYSTEMS EMPLOYING HIGH-SPEED SERIAL LINKS 有权
    使用高速串行链接的存储系统编码系统

    公开(公告)号:US20100102999A1

    公开(公告)日:2010-04-29

    申请号:US12260972

    申请日:2008-10-29

    IPC分类号: H03M7/46

    CPC分类号: H03M5/145

    摘要: A method, apparatus and system employing a coder is disclosed. The coder to receive an incoming stream including a first code block and a second code block, and partition the first code block into first small code blocks, and partition the second code block into second small code blocks. The coder is further to code a memory that uses one or more serial lines for communication is performed, wherein coding includes coding the first small code blocks of the first code block and the second small code blocks of the second code block, wherein the coding of the first and second blocks is performed such that a maximum run length is maintained.

    摘要翻译: 公开了一种采用编码器的方法,装置和系统。 编码器,用于接收包括第一代码块和第二代码块的输入流,并将第一代码块划分为第一小代码块,并将第二代码块划分成第二小代码块。 编码器进一步编码使用一个或多个串行线进行通信的存储器,其中编码包括对第一代码块的第一小代码块和第二代码块的第二小代码块进行编码,其中编码 执行第一和第二块,使得保持最大行程长度。

    METHOD, APPARATUS, AND SYSTEM FOR AUTOMATIC DATA ALIGNER FOR MULTIPLE SERIAL RECEIVERS
    19.
    发明申请
    METHOD, APPARATUS, AND SYSTEM FOR AUTOMATIC DATA ALIGNER FOR MULTIPLE SERIAL RECEIVERS 有权
    用于多个串行接收器的自动数据对齐器的方法,装置和系统

    公开(公告)号:US20100103929A1

    公开(公告)日:2010-04-29

    申请号:US12260970

    申请日:2008-10-29

    IPC分类号: H04L12/50

    摘要: A method, apparatus and system for employing an automatic data aligner for multiple serial receivers in serial link technologies is provided. In one embodiment, converting a transmission data path of a single bit into a parallel bit via a data aligner, wherein the data is being transmitted via one or more ports. Further, binding data transmission channels to reduce latency in transmission of the data, wherein the binding of the data transmission channels further includes inserting delay to match latency via the one or more ports.

    摘要翻译: 提供了一种在串行链路技术中采用多个串行接收机的自动数据对准器的方法,装置和系统。 在一个实施例中,经由数据对准器将单个位的传输数据路径转换为并行位,其中数据正通过一个或多个端口传输。 此外,绑定数据传输信道以减少数据传输中的等待时间,其中数据传输信道的绑定还包括插入延迟以经由一个或多个端口匹配等待时间。

    DISCOVERY OF CONNECTIONS UTILIZING A CONTROL BUS
    20.
    发明申请
    DISCOVERY OF CONNECTIONS UTILIZING A CONTROL BUS 有权
    发现使用控制总线的连接

    公开(公告)号:US20100100200A1

    公开(公告)日:2010-04-22

    申请号:US12577707

    申请日:2009-10-12

    IPC分类号: G05B11/01

    CPC分类号: G06F13/4022 G06F13/4081

    摘要: Discovery of connections utilizing a control bus. An embodiment of a method includes detecting a transition of a control bus from a high state to a low state by a source device, the source device being configured to be coupled with a sink device via an interface, the interface including the control bus, the source device including a pullup device and the sink device including a pulldown device;pulsing the control bus to a high state at the source device; and upon detecting by the source device that the control bus remains in the high state ceasing the pulsing of the control bus to the high state, and transitioning the source device from a disconnected state to a connected state.

    摘要翻译: 发现使用控制总线的连接。 一种方法的实施例包括:通过源设备检测控制总线从高状态​​到低状态的转换,源设备被配置为经由接口与宿设备耦合,所述接口包括控制总线, 源装置,其包括上拉装置,并且所述信宿装置包括下拉装置;将所述控制总线脉冲到所述源装置处的高状态; 并且当源设备检测到控制总线保持在高状态时,停止控制总线的脉冲到高状态,并且将源设备从断开状态转换到连接状态。