公开(公告)号：US10365830B2

公开(公告)日：2019-07-30

申请号：US15786207

申请日：2017-10-17

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jian He ,  Xiaoke Ni ,  Yu Liu ,  Jinshui Liu

IPC: G06F3/06 ,  G06F12/02 ,  G06F15/173 ,  G06F12/1081

Abstract: A method, device, and system for implementing hardware acceleration processing, where the method includes memory mapping input/output (MMIO) processing being performed on a data buffer address of a hardware acceleration processor in order to obtain an address in addressing space of a central processing unit (CPU). In addition, a network adapter has a remote direct memory access (RDMA) or a direct memory access (DMA) function. Alternatively, a network adapter of a hardware acceleration device can directly send received data on which the hardware acceleration processing is to be performed to a hardware acceleration processor. In this way, resource consumption is reduced when the CPU of a computer device receives and forwards the data on which the hardware acceleration processing is to be performed, and in addition, storage space of a memory of the computer device is saved.

公开(公告)号：US20180239539A1

公开(公告)日：2018-08-23

申请号：US15961851

申请日：2018-04-24

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jian He ,  Xiaoke Ni ,  Yimin Yao

IPC: G06F3/06 ,  G06F13/42

CPC classification number: G06F3/067 ,  G06F3/0617 ,  G06F3/0629 ,  G06F3/0635 ,  G06F3/0659 ,  G06F3/0689 ,  G06F13/385 ,  G06F13/4022 ,  G06F13/42 ,  G06F2213/0026

Abstract: A packet forwarding method, device, and system for use in non-volatile memory express (NVMe) over fabric. According to the method, a first packet sent by a control device is received, and an input/output command or a management command that complies with the NVMe protocol and that is included in the first packet is obtained; a second packet is generated according to the input/output command or the management command, where the input/output command or the management command complies with the NVMe protocol and is included in the first packet, and the second packet is a packet for executing the input/output command or the management command; a network port for forwarding the second packet is selected according to an identity of a target non-volatile memory; and the second packet is encapsulated into a packet that meets an NVMe over fabric forwarding requirement, and the encapsulated second packet is sent by using the selected network port.

公开(公告)号：US20180059939A1

公开(公告)日：2018-03-01

申请号：US15786207

申请日：2017-10-17

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jian He ,  Xiaoke Ni ,  Yu Liu ,  Jinshui Liu

IPC: G06F3/06 ,  G06F15/173 ,  G06F12/1081

CPC classification number: G06F3/061 ,  G06F3/0659 ,  G06F12/0284 ,  G06F12/1081 ,  G06F15/17331 ,  G06F2212/1016 ,  G06F2212/1041 ,  G06F2212/154 ,  G06F2212/206

Abstract: A method, device, and system for implementing hardware acceleration processing, where the method includes memory mapping input/output (MMIO) processing being performed on a data buffer address of a hardware acceleration processor in order to obtain an address in addressing space of a central processing unit (CPU). In addition, a network adapter has a remote direct memory access (RDMA) or a direct memory access (DMA) function. Alternatively, a network adapter of a hardware acceleration device can directly send received data on which the hardware acceleration processing is to be performed to a hardware acceleration processor. In this way, resource consumption is reduced when the CPU of a computer device receives and forwards the data on which the hardware acceleration processing is to be performed, and in addition, storage space of a memory of the computer device is saved.

公开(公告)号：US09459798B2

公开(公告)日：2016-10-04

申请号：US14567656

申请日：2014-12-11

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jian He ,  Guangyu Shi ,  Xiaoke Ni ,  Norbert Egi ,  Xiancai Li ,  Yu Liu ,  Huawei Liu

IPC: G06F13/12 ,  G06F13/38 ,  G06F3/06 ,  G06F13/10 ,  G06F12/10 ,  G06F13/28 ,  G06F13/40 ,  G06F13/42

CPC classification number: G06F13/4282 ,  G06F3/061 ,  G06F3/0611 ,  G06F3/0655 ,  G06F3/0673 ,  G06F12/10 ,  G06F13/10 ,  G06F13/28 ,  G06F13/4022 ,  G06F13/4221 ,  G06F2212/1016

Abstract: Embodiments of the present invention provide a data processing system and a data processing method. An MMIO address of a data request is obtained, where data stored in a PCIe storage device can be directly obtained from the MMIO address, and according to the MMIO address, a network adapter can directly read the data from the PCIe storage device of the data processing system, and transmit the data to a second data processing system, or directly write the data received from the second data processing system into the PCIe storage device. Therefore, the processing system can implement transmitting data directly from the PCIe storage device to the network adapter without using memory. During data transmission between the two data processing systems, a usage ratio of a resource, such as memory and a CPU, is reduced, and efficiency of data transmission is improved.

Abstract translation: 本发明的实施例提供了一种数据处理系统和数据处理方法。 获得数据请求的MMIO地址，其中可以从MMIO地址直接获取存储在PCIe存储设备中的数据，并且根据MMIO地址，网络适配器可以直接从PCIe存储设备读取数据 处理系统，并将数据发送到第二数据处理系统，或直接将从第二数据处理系统接收的数据写入PCIe存储设备。 因此，处理系统可以在不使用存储器的情况下实现从PCIe存储设备直接发送数据到网络适配器。 在两个数据处理系统之间的数据传输期间，诸如存储器和CPU之类的资源的使用率被降低，并且提高了数据传输的效率。