公开(公告)号：US10249732B1

公开(公告)日：2019-04-02

申请号：US15823856

申请日：2017-11-28

Applicant: Hyundai Motor Company ,  Kia Motors Corporation

Inventor： Youngkyun Jung ,  NackYong Joo ,  Junghee Park ,  Hyun Woo Noh ,  JongSeok Lee ,  Dae Hwan Chun

IPC: H01L21/76 ,  H01L29/66 ,  H01L21/308 ,  H01L21/3065 ,  H01L29/423

Abstract: A manufacturing method of a semiconductor device is provided. The method includes sequentially forming an n− type of layer, a p type of region, and an n+ type of region on a first surface of a substrate, forming a preliminary trench in the n− type of layer by a first etching process and forming a preliminary gate insulating layer by a first thermal oxidation process. The method includes etching the lower surface of the preliminary trench and the preliminary second portion to form a trench by a second etching process and forming a gate insulating layer in the trench by a second thermal oxidation process. The gate insulating layer includes a first and second portion. The preliminary first portion is thicker than the preliminary second portion and the first portion. The first portion thickness is equal to the thickness of the second portion.

公开(公告)号：US10115794B2

公开(公告)日：2018-10-30

申请号：US15363892

申请日：2016-11-29

Applicant: HYUNDAI MOTOR COMPANY ,  Hyundai Autron Co., Ltd.

Inventor： Dae Hwan Chun ,  Youngkyun Jung ,  JongSeok Lee ,  Youngjoon Kim ,  Taeyeop Kim ,  Hyuk Woo

IPC: H01L29/94 ,  H01L29/16 ,  H01L21/02 ,  H01L21/306 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78

Abstract: A semiconductor device includes: an n− type layer disposed on a first surface of an n+ type silicon carbide substrate; a first trench formed in the n− type layer; a p type region disposed on both side surfaces of the first trench; an n+ type region disposed on both side surfaces of the first trench and disposed on the n− type layer and the p type region; a gate insulating layer disposed inside the first trench; a gate electrode disposed on the gate insulating layer; an oxide layer disposed on the gate electrode; a source electrode disposed on the oxide layer and the n+ region; and a drain electrode disposed on the second surface of the n+ type silicon carbide substrate, wherein a first channel as an accumulation layer channel and a second channel as an inversion layer channel are disposed in both side surfaces of the first trench, and the first channel and the second channel are disposed to be adjacent in a horizontal direction for the first surface of the n+ type silicon carbide substrate.

公开(公告)号：US09997624B2

公开(公告)日：2018-06-12

申请号：US15348613

申请日：2016-11-10

Applicant: HYUNDAI MOTOR COMPANY

Inventor： NackYong Joo ,  Youngkyun Jung ,  Junghee Park ,  JongSeok Lee ,  Dae Hwan Chun

IPC: H01L29/78 ,  H01L21/265 ,  H01L29/16 ,  H01L29/45 ,  H01L29/49 ,  H01L29/66

CPC classification number: H01L29/7813 ,  H01L21/047 ,  H01L21/26586 ,  H01L29/1608 ,  H01L29/45 ,  H01L29/4916 ,  H01L29/66068

Abstract: A semiconductor device includes: an n− type layer disposed on a first surface of an n+ type silicon carbide substrate; a first trench and a second trench formed in the n− type layer and separated from each other; an n+ type region disposed between a side surface of the first trench and the side surface of the second trench and disposed on the n− type layer; a gate insulating layer disposed inside the first trench; a source insulating layer disposed inside the second trench; a gate electrode disposed on the gate insulating layer; an oxide layer disposed on the gate electrode; a source electrode disposed on the oxide layer, the n+ type region, and the source insulating layer; and a drain electrode disposed on a second surface of the n+ type silicon carbide substrate.

公开(公告)号：US20180108774A1

公开(公告)日：2018-04-19

申请号：US15377708

申请日：2016-12-13

Applicant: Hyundai Motor Company

Inventor： Dae Hwan Chun ,  Youngkyun Jung ,  NackYong Joo ,  Junghee Park ,  JongSeok Lee

IPC: H01L29/78 ,  H01L29/16 ,  H01L29/423 ,  H01L29/66 ,  H01L21/265 ,  H01L21/306

CPC classification number: H01L29/7827 ,  H01L21/26506 ,  H01L21/30604 ,  H01L29/1608 ,  H01L29/4236 ,  H01L29/66068 ,  H01L29/66666

Abstract: A semiconductor device includes an n+ type silicon carbide substrate, an n− type layer, an n type layer, a plurality of trenches, a p type region, an n+ type region, a gate insulating film, a gate electrode, a source electrode, a drain electrode, and a channel. The plurality of trenches is disposed in a planar matrix shape. The n+ type region is disposed in a planar mesh type with openings, surrounds each of the trenches, and is in contact with the source electrode between the trenches adjacent to each other in a planar diagonal direction. The p type region is disposed in the opening of the n+ type region in a planar mesh type.