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公开(公告)号:US11822802B2
公开(公告)日:2023-11-21
申请号:US17558260
申请日:2021-12-21
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Derek Alan Sherlock
CPC classification number: G06F3/064 , G06F3/0619 , G06F3/0656 , G06F3/0659 , G06F3/0689
Abstract: One aspect of the instant application can provide a storage system. The storage system can include a plurality of byte-addressable storage devices and a plurality of media controllers. A respective byte-addressable storage device is to store a parity block or a data block of a data stripe, and a respective media controller is coupled to a corresponding byte-addressable storage device. Each media controller can include a tracker logic block to serialize critical sections of multiple media-access sequences associated with an address on the corresponding byte-addressable storage device. Each media-access sequence comprises one or more read and/or write operations, and the data stripe may be inconsistent during a critical section of a media-access sequence.
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公开(公告)号:US20230079278A1
公开(公告)日:2023-03-16
申请号:US17473643
申请日:2021-09-13
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Derek Alan Sherlock
IPC: H04L12/801 , H04L12/26
Abstract: A system for facilitating efficient progression management in a multi-source tracker of a responder device is provided. During operation, the system can maintain, in a memory device of the responder device, a first tracker for all requests and a second tracker for a privileged group of requests. The system can select a first group from a set of groups as the privileged group. If a request from a requesting device cannot be accepted into the first tracker, the system can determine whether the request belongs to the first group based on a header field of the request. If the request belongs to the first group, the system can select the request for accepting into the second tracker. Subsequently, when a respective request belonging to the first group has been accepted, the system can select a second group from the set of groups as the privileged group.
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公开(公告)号:US11016683B2
公开(公告)日:2021-05-25
申请号:US16707946
申请日:2019-12-09
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Harvey Ray , Gary Gostin , Derek Alan Sherlock , Gregg B. Lesartre
Abstract: According to an example, a lock may be requested by a first redundancy controller from a parity media controller to perform a first sequence that accesses multiple memory modules in a stripe. The lock may be acquired for the stripe so that the first sequence may be performed on the stripe. The lock may then be released from the stripe.
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公开(公告)号:US10824465B2
公开(公告)日:2020-11-03
申请号:US15467560
申请日:2017-03-23
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Gregg B. Lesartre , Derek Alan Sherlock
IPC: G06F9/46
Abstract: A method may include receiving a first transaction request. The method may further include transmitting a retry response to the transaction request, which includes a first epoch identifier associated with a current epoch. The method may further include receiving a second transaction request, which includes a second epoch identifier associated with a previous epoch. The second transaction request may be fulfilled using a transaction resource reserved for the previous epoch.
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公开(公告)号:US10402287B2
公开(公告)日:2019-09-03
申请号:US15500064
申请日:2015-01-30
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Derek Alan Sherlock , Harvey Ray , Chris Michael Brueggen
Abstract: According to an example, data corruption and single point of failure is prevented in a fault-tolerant memory fabric with multiple redundancy controllers by granting, by a parity media controller, a lock of a stripe to a redundancy controller to perform a sequence on the stripe. The lock may be broken in response to determining a failure of the redundancy controller prior to completing the sequence. In response to breaking the lock, the parity cacheline of the stripe may be flagged as invalid. Also, a journal may be updated to document the breaking of the lock.
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公开(公告)号:US10355978B2
公开(公告)日:2019-07-16
申请号:US15626983
申请日:2017-06-19
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Gregg B. Lesartre , Derek Alan Sherlock , Gary Gostin , Nicholas George McDonald , Alan Davis , Darel N. Emmot , John Kim
IPC: H04L12/26 , H04L12/823 , H04L12/841 , H04L12/733 , H04L12/721 , H04L29/08
Abstract: Example implementations relate to calculating a time to live (TTL). An example implementation includes receiving a transaction request containing a first time to live (TTL) from a requester. A second TTL for a transaction response may be computed, and a transaction response containing the second TTL may be transmitted.
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公开(公告)号:US11888751B2
公开(公告)日:2024-01-30
申请号:US17672481
申请日:2022-02-15
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Frank R. Dropps , Joseph G. Tietz , Derek Alan Sherlock
IPC: H04L47/2441 , H04L47/2483 , H04L47/78 , H04L47/52 , H04L47/10
CPC classification number: H04L47/2441 , H04L47/2483 , H04L47/39 , H04L47/521 , H04L47/781
Abstract: A system for facilitating enhanced virtual channel switching in a node of a distributed computing environment is provided. During operation, the system can allocate flow control credits for a first virtual channel to an upstream node in the distributed computing environment. The system can receive, via a message path comprising the upstream node, a message on the first virtual channel based on the allocated flow control credits. The system can then store the message in a queue associated with an input port and determine whether the message is a candidate for changing the first virtual channel at the node based on a mapping rule associated with the input port. If the message is a candidate, the system can associate the message with a second virtual channel indicated in the mapping rule in the queue. Subsequently, the system can send the message from the queue on the second virtual channel.
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公开(公告)号:US20230195340A1
公开(公告)日:2023-06-22
申请号:US17558260
申请日:2021-12-21
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Derek Alan Sherlock
IPC: G06F3/06
CPC classification number: G06F3/064 , G06F3/0659 , G06F3/0656 , G06F3/0619 , G06F3/0689
Abstract: One aspect of the instant application can provide a storage system. The storage system can include a plurality of byte-addressable storage devices and a plurality of media controllers. A respective byte-addressable storage device is to store a parity block or a data block of a data stripe, and a respective media controller is coupled to a corresponding byte-addressable storage device. Each media controller can include a tracker logic block to serialize critical sections of multiple media-access sequences associated with an address on the corresponding byte-addressable storage device. Each media-access sequence comprises one or more read and/or write operations, and the data stripe may be inconsistent during a critical section of a media-access sequence.
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公开(公告)号:US10678475B2
公开(公告)日:2020-06-09
申请号:US15661323
申请日:2017-07-27
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Derek Alan Sherlock
Abstract: In some examples, a tracker receives a write request that is acknowledged upon receipt by a destination media controller without waiting for achievement of persistence of write data associated with the write request. The tracker adds an identifier of the destination media controller to a tracking structure in response to the identifier not already being present in the tracking structure. The tracker sends a request to persist write operations to media controllers identified by the tracking structure.
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公开(公告)号:US10649829B2
公开(公告)日:2020-05-12
申请号:US15645105
申请日:2017-07-10
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Derek Alan Sherlock , Shawn Walker , Paolo Faraboschi
Abstract: In some examples, a controller includes a counter to track errors associated with a group of memory access operations, and processing logic to detect an error associated with the group of memory access operations, determine whether the detected error causes an error state change of the group of memory access operations, and cause advancing of the counter responsive to determining that the detected error causes the error state change of the group of memory access operations.
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