公开(公告)号：US20050122150A1

公开(公告)日：2005-06-09

申请号：US10994310

申请日：2004-11-23

申请人： Masami Iseki ,  Somei Kawasaki ,  Fujio Kawano ,  Takanori Yamashita

发明人： Masami Iseki ,  Somei Kawasaki ,  Fujio Kawano ,  Takanori Yamashita

IPC分类号： G09G3/30 ,  G09F9/30 ,  G09G3/20 ,  G09G3/32 ,  H03K5/153

CPC分类号： G09G3/3283 ,  G09G3/3241 ,  G09G3/325 ,  G09G3/3266 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/0289 ,  G09G2330/021 ,  G09G2330/026 ,  G09G2330/045

摘要： The present application discloses a driver having a configuration comprising: a drive transistor for supplying a current of the quantity corresponding to a gate potential, into the element as a driving current; a first switch installed in the path of the driving current passing between the element and the drive transistor, for controlling the flow of the driving current; a second switch for switching between the first state of setting the gate potential of the drive transistor and the second state of keeping the set gate potential; a circuit for supplying a signal for controlling the flow of the driving current in a restricted state to the first switch, for a predetermined period in a period after the starting the supply of the potential for driving the drive transistor from a power source and until start of driving the element in a normal operation; a circuit for supplying a signal for setting the second switch at the first state, to the second switch: and a circuit for interrupting a signal for setting the gate potential while the second switch is in the first state in the predetermined period.

摘要翻译： 本申请公开了一种驱动器，其具有如下结构：驱动晶体管，用于将与栅极电位相对应的量的电流作为驱动电流提供到元件中; 安装在通过元件和驱动晶体管之间的驱动电流的路径中的第一开关，用于控制驱动电流的流动; 第二开关，用于在设置驱动晶体管的栅极电位的第一状态和保持所设置的栅极电位的第二状态之间切换; 在开始从电源驱动驱动晶体管的电位开始到起动之间的期间内，将预定时间段提供用于将限制状态下的驱动电流的流动控制到第一开关的电路 在正常操作中驱动元件; 用于向第二开关提供用于将第二开关设置的信号的电路提供给第二开关;以及用于在第二开关处于预定周期中处于第一状态时中断用于设置栅极电位的信号的电路。

公开(公告)号：US20060132395A1

公开(公告)日：2006-06-22

申请号：US11275011

申请日：2005-12-01

申请人： Somei Kawasaki ,  Masami Iseki ,  Fujio Kawano ,  Takanori Yamashita

发明人： Somei Kawasaki ,  Masami Iseki ,  Fujio Kawano ,  Takanori Yamashita

IPC分类号： G09G3/22

CPC分类号： G09G3/3283 ,  G09G3/325 ,  G09G2300/0426 ,  G09G2300/0861 ,  G09G2310/0251 ,  G09G2320/0223

摘要： A current programming apparatus having two data lines for a pixel line is presented. An image data current is supplied to the first and the second data lines alternatively by switching M1 and M2 complementally. By switching M7 and M8 on during the switches M1 and M2 turn on respectively, a constant current is supplied to the data line to which the data current is not supplied. The scanning signals are applied so as to write a constant current into pixels immediately before the data current is written. Thus a write-in defect by a fluctuation in the threshold voltages is prevented.

摘要翻译： 提出了一种具有用于像素线的两条数据线的当前编程设备。 通过互补地切换M 1和M 2，将图像数据电流交替地提供给第一和第二数据线。 通过在开关M 1和M 2分别导通时切换M 7和M 8导通，向不提供数据电流的数据线提供恒定电流。 施加扫描信号，以便在写入数据电流之前将恒定电流写入像素。 因此，防止了由阈值电压的波动引起的写入缺陷。

公开(公告)号：US20060114195A1

公开(公告)日：2006-06-01

申请号：US11283862

申请日：2005-11-22

申请人： Takanori Yamashita ,  Masami Iseki ,  Fujio Kawano

发明人： Takanori Yamashita ,  Masami Iseki ,  Fujio Kawano

IPC分类号： G09G3/30

CPC分类号： G09G3/325 ,  G09G2300/0861 ,  G09G2320/029 ,  G09G2320/043

摘要： A current programming apparatus includes a current source; a plurality of first circuits to which data currents are supplied through a data line, the first circuits commonly connected with the data line; a second circuit having a terminal connected to the current source; a switch connecting or breaking the second circuit with or from the data line, wherein the current source generates a predetermined current to supply the generated current to the second circuit through the terminal while the switch is off, whereby the value of the predetermined current is written in the second circuit, and wherein the current source generates a current based on data, and the second circuit generates a current based on the written value of the predetermined current, and a difference current between the current generated by the current source and the current generated by second circuit is supplied to the first circuits through the data line while the switch is on, whereby the value of the current is written in the first circuits as the value of the data current. The influence of parasitic capacitance of the data line can be suppressed to stabilize the writing operation of the current.

摘要翻译： 当前编程设备包括电流源; 通过数据线提供数据电流的多个第一电路，与数据线共同连接的第一电路; 具有连接到所述电流源的端子的第二电路; 连接或断开第二电路与数据线的开关的开关，其中电流源产生预定电流，以在开关断开时通过端子将产生的电流提供给第二电路，由此写入预定电流的值 在第二电路中，并且其中电流源基于数据产生电流，并且第二电路基于预定电流的写入值产生电流，并且由电流源产生的电流与产生的电流之间的差电流 通过第二电路在开关导通时通过数据线提供给第一电路，由此将电流值写入第一电路中作为数据电流的值。 可以抑制数据线的寄生电容的影响，以稳定电流的写入操作。

公开(公告)号：US07692643B2

公开(公告)日：2010-04-06

申请号：US11283743

申请日：2005-11-22

申请人： Somei Kawasaki ,  Masami Iseki ,  Fujio Kawano ,  Takanori Yamashita

发明人： Somei Kawasaki ,  Masami Iseki ,  Fujio Kawano ,  Takanori Yamashita

IPC分类号： G06F3/038

CPC分类号： G09G3/325 ,  G09G2300/0842 ,  G09G2310/0248 ,  G09G2320/0223

摘要： An active matrix type display apparatus includes a plurality of pixel circuits each having an electroluminescent element EL, a 1st FET to control a current flowing in the EL, and a 2nd FET provided between a gate and a drain of the 1st FET. The plurality of pixel circuits are arranged in a matrix and have every column connected to a data line. The 2nd FET is turned on for a predetermined time period, and an image data current flowing in the data line is supplied to the gate and drain of the 1st FET, thereby writing a current value of the image data current. A preliminary charging circuit is connected to the data line. Before the writing operation in the predetermined time period is expired, a current of a predetermined current value is applied to the image data current so that a gate-source voltage of the 1st FET is equal to or larger than a threshold value.

摘要翻译： 有源矩阵型显示装置包括各自具有电致发光元件EL的多个像素电路，用于控制在EL中流动的电流的第一FET，以及设置在第一FET的栅极与漏极之间的第二FET。 多个像素电路被布置成矩阵并且每列连接到数据线。 第二FET导通预定的时间段，并且流过数据线的图像数据电流被提供给第一FET的栅极和漏极，从而写入图像数据电流的当前值。 预充电电路连接到数据线。 在预定时间段内的写入操作期满之前，将预定电流值的电流施加到图像数据电流，使得第一FET的栅极 - 源极电压等于或大于阈值。

公开(公告)号：US20060120357A1

公开(公告)日：2006-06-08

申请号：US11290578

申请日：2005-12-01

申请人： Somei Kawasaki ,  Masami Iseki ,  Fujio Kawano ,  Takanori Yamashita

发明人： Somei Kawasaki ,  Masami Iseki ,  Fujio Kawano ,  Takanori Yamashita

IPC分类号： H04L12/66

CPC分类号： G09G3/3283 ,  G09G3/325 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2320/0233

摘要： Even if characteristics of transistors differ every circuit, in order to suppress an influence by the different characteristics and stabilize the programming operation to a control electrode of a drive transistor even if a data signal is small, there is provided a programming apparatus for programming signals which are supplied to a circuit array (61, 62) having a plurality of circuits each having transistors (M11, M12), first switching elements (M21, M22) connected to control electrodes of the transistors, and second switching elements (M31, M32) each connected to one main electrode of each of the transistors. The programming apparatus has: a current generating circuit (M3, M4) which is connected in common to each of the second switching elements of the circuit array and generates a current corresponding to a current flowing in the transistor of the selected circuit; and an operational amplifier (OPAMP1) which is connected in common to each of the first switching elements of the circuit array and supplies the program signal to the control electrode of the transistor of the selected circuit. A data signal and a signal corresponding to the current generated by the current generating circuit are inputted to the operational amplifier.

摘要翻译： 即使每个电路的晶体管的特性不同，为了抑制不同特性的影响，即使数据信号较小，也能将编程操作稳定在驱动晶体管的控制电极上，因此提供了一种用于对信号进行编程的编程装置 被提供给具有多个电路的电路阵列（61,62），每个电路各自具有晶体管（M 11，M 12），连接到晶体管的控制电极的第一开关元件（M 21，M 22）和第二开关元件 M 31，M 32），每个连接到每个晶体管的一个主电极。 编程装置具有：电流产生电路（M 3，M 4），其共同连接到电路阵列的每个第二开关元件，并产生与流过所选电路的晶体管的电流相对应的电流; 以及与电路阵列的每个第一开关元件共同连接的运算放大器（运算放大器1），并将编程信号提供给所选电路的晶体管的控制电极。 将数据信号和与电流产生电路产生的电流对应的信号输入到运算放大器。

公开(公告)号：US07903053B2

公开(公告)日：2011-03-08

申请号：US11275011

申请日：2005-12-01

申请人： Somei Kawasaki ,  Masami Iseki ,  Fujio Kawano ,  Takanori Yamashita

发明人： Somei Kawasaki ,  Masami Iseki ,  Fujio Kawano ,  Takanori Yamashita

IPC分类号： G09G3/30

CPC分类号： G09G3/3283 ,  G09G3/325 ,  G09G2300/0426 ,  G09G2300/0861 ,  G09G2310/0251 ,  G09G2320/0223

摘要： A matrix display apparatus includes a plurality of current-driven display devices arranged along row and column directions, a first circuit provided for each of the display devices, a plurality of data lines arranged for each column, with the data lines supplying an image data signal to a plurality of pixel circuits included in each one of the columns, and a plurality of row scanning lines for transmitting a scanning signal for selecting row by row the plurality of pixel circuits. The first circuit includes a field effect transistor for supplying one of the display devices with a current, which has a control electrode and two principal electrodes, a first switch connecting the control electrode and one of the principal electrodes of the field effect transistor, and a second switch having one terminal connected to the one of the principal electrodes of the field effect transistor and having another terminal connected to one of the data lines along the column of the first circuit. The first circuits in the column are connected in successively divided manner to the plurality of the data lines through the second switch.

摘要翻译： 一种矩阵显示装置，包括沿着列和列方向排列的多个电流驱动显示装置，为每个显示装置设置的第一电路，为每列布置的多条数据线，数据线提供图像数据信号 涉及包括在每列中的多个像素电路，以及多条行扫描线，用于发送用于逐行选择的多个像素电路的扫描信号。 第一电路包括用于向显示装置中的一个提供电流的场效应晶体管，其具有控制电极和两个主电极，连接控制电极和场效应晶体管的主电极之一的第一开关，以及 第二开关具有连接到场效应晶体管的一个主电极的一个端子，并且具有连接到沿着第一电路的列的数据线之一的另一端子。 列中的第一电路通过第二开关以连续分割的方式连接到多条数据线。

公开(公告)号：US20100270678A1

公开(公告)日：2010-10-28

申请号：US12762628

申请日：2010-04-19

申请人： Kouji Ikeda ,  Takanori Yamashita ,  Masami Iseki

发明人： Kouji Ikeda ,  Takanori Yamashita ,  Masami Iseki

IPC分类号： H01L23/48

CPC分类号： G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0439 ,  G09G2300/0842 ,  H01L27/3262 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device including a plurality of circuits that includes a transistor, where a semiconductor layer forming the transistor includes a first contact pad, a first part that is connected to the first contact pad and that extends in a direction intersecting a short direction of a pitch with which the circuits are arranged, a second part that extends from the first part in the short direction, and a second contact pad including the first part and the second part that are provided between the first contact pad and the second contact pad, where the second part overlaps an electrode layer across an insulating layer.

摘要翻译： 一种半导体器件，包括包括晶体管的多个电路，其中形成晶体管的半导体层包括第一接触焊盘，连接到第一接触焊盘的第一部分，并且沿与沟道的短方向交叉的方向延伸的第一部分 电路布置在其上，第一部分在短方向上延伸的第二部分以及设置在第一接触焊盘和第二接触焊盘之间的包括第一部分和第二部分的第二接触焊盘，其中 第二部分跨越绝缘层与电极层重叠。

公开(公告)号：US08653541B2

公开(公告)日：2014-02-18

申请号：US12762628

申请日：2010-04-19

申请人： Kouji Ikeda ,  Takanori Yamashita ,  Masami Iseki

发明人： Kouji Ikeda ,  Takanori Yamashita ,  Masami Iseki

IPC分类号： H01L23/48

CPC分类号： G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0439 ,  G09G2300/0842 ,  H01L27/3262 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device including a plurality of circuits that includes a transistor, where a semiconductor layer forming the transistor includes a first contact pad, a first part that is connected to the first contact pad and that extends in a direction intersecting a short direction of a pitch with which the circuits are arranged, a second part that extends from the first part in the short direction, and a second contact pad including the first part and the second part that are provided between the first contact pad and the second contact pad, where the second part overlaps an electrode layer across an insulating layer.

摘要翻译： 一种半导体器件，包括包括晶体管的多个电路，其中形成晶体管的半导体层包括第一接触焊盘，连接到第一接触焊盘的第一部分，并且沿与沟道的短方向交叉的方向延伸的第一部分 电路布置在其上，第一部分在短方向上延伸的第二部分以及设置在第一接触焊盘和第二接触焊盘之间的包括第一部分和第二部分的第二接触焊盘，其中 第二部分跨越绝缘层与电极层重叠。

公开(公告)号：US20110205210A1

公开(公告)日：2011-08-25

申请号：US13030401

申请日：2011-02-18

申请人： Takanori Yamashita ,  Tatsuhito Goden

发明人： Takanori Yamashita ,  Tatsuhito Goden

IPC分类号： G06F3/038

CPC分类号： G09G3/3291 ,  G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/0297 ,  G09G2320/0219

摘要： In a display apparatus, after sampling switches turn on and a voltage signal to be held in a driving circuit is transmitted to a plurality of data lines and subsequently the sampling switches turn off, a selected scanning line supplies a control signal to the driving circuits along the selected scanning line, thereby causing the driving circuits to hold the voltage signal, and the plurality of scanning lines supply a control signal to the driving circuits simultaneously, and thereafter the sampling switches turn on and the voltage signal which is to cause the driving circuit to drive the display element is transmitted to the data lines thereby causing the driving circuits along the plurality of scanning lines to drive the display element simultaneously.

摘要翻译： 在显示装置中，在采样开关导通之后，要保持在驱动电路中的电压信号被发送到多条数据线，随后采样开关截止，所选择的扫描线将控制信号提供给驱动电路 所选择的扫描线，从而使驱动电路保持电压信号，并且多条扫描线同时向驱动电路提供控制信号，之后采样开关导通，并且导致驱动电路的电压信号 驱动显示元件被发送到数据线，从而使沿着多条扫描线的驱动电路同时驱动显示元件。

公开(公告)号：US07048822B2

公开(公告)日：2006-05-23

申请号：US09913501

申请日：2000-12-18

申请人： Takanori Yamashita ,  Masataka Okushita ,  Kazuki Yamada ,  Rikiya Yamashita ,  Hiroshi Miyama ,  Youichi Mochizuki

发明人： Takanori Yamashita ,  Masataka Okushita ,  Kazuki Yamada ,  Rikiya Yamashita ,  Hiroshi Miyama ,  Youichi Mochizuki

IPC分类号： C09J4/00 ,  H01M6/00 ,  C23C22/07 ,  B05D3/02

CPC分类号： H01M2/0275 ,  B32B15/085 ,  B32B15/088 ,  B32B15/20 ,  B32B27/16 ,  C23C22/05 ,  H01M2/0277 ,  H01M2/0287 ,  H01M10/05 ,  Y10T29/4911 ,  Y10T29/49112 ,  Y10T29/49114 ,  Y10T29/49115 ,  Y10T428/31678 ,  Y10T428/31681 ,  Y10T428/31692 ,  Y10T428/31913 ,  Y10T428/31928

摘要： A polymer battery module packaging sheet includes, as essential components, a base layer (61), an aluminum layer (62), chemical conversion coatings (64a, 64b) coating the opposite surfaces of the aluminum layer (62), and an innermost layer (63). The chemical conversion coatings (64a, 64b) are formed by processing the opposite surfaces of the aluminum layer (62) by a phosphate treatment method. The base layer (61) and the innermost layer (63) are bonded to the chemical conversion coatings (64a, 64b) of the aluminum layer (62) with adhesive layers (65a, 65b), respectively.

摘要翻译： 聚合物电池模块包装片包括作为必要组分的基层（61），铝层（62），涂覆铝层（62）的相对表面的化学转化涂层（64a，64b）和 最内层（63）。 通过磷酸盐处理方法处理铝层（62）的相对表面，形成化学转化涂层（64a，64b）。 基底层（61）和最内层（63）分别用粘合剂层（65a，65b）与铝层（62）的化学转化涂层（64a，64b）结合。