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公开(公告)号:US20230400982A1
公开(公告)日:2023-12-14
申请号:US18176707
申请日:2023-03-01
Applicant: Hitachi, Ltd.
Inventor: Hiroka IHARA , Nobuhiro YOKOI , Takashi NAGAO , Yoshihiro YOSHII
IPC: G06F3/06
CPC classification number: G06F3/061 , G06F3/0641 , G06F3/0679
Abstract: A storage system includes: a central processing unit; a main memory; first management information that associates a hash value of received data with an address in a volume; and an I/O processing package. The I/O processing package includes an I/O processor and an I/O memory. The I/O processor executes protocol processing. The I/O processor executes at least a part of search processing of an address associated with a hash value of first received data in the first management information. The central processing unit controls execution of deduplication processing of the first received data based on data of an address associated with the hash value of the first received data.
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公开(公告)号:US20230075635A1
公开(公告)日:2023-03-09
申请号:US17690965
申请日:2022-03-09
Applicant: Hitachi, Ltd.
Inventor: Kentaro SHIMADA , Takashi NAGAO , Naoya OKADA
IPC: G06F3/06
Abstract: A bandwidth between a second processor and a second memory is higher than a bandwidth between a first processor and a first memory. The first memory stores a read command from a host computer. The first processor analyzes a content of the read command, and in accordance with a result of the analysis, requests read data from the second processor. In response to the request from the first processor, the second processor reads the read data from one or more storage drives and stores the read data in the second memory. The second processor notifies the first processor that the read data is stored in the second memory. The first processor transfers the read data read from the second memory, to the host computer without storing the read data in the first memory.
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公开(公告)号:US20230214134A1
公开(公告)日:2023-07-06
申请号:US17939789
申请日:2022-09-07
Applicant: Hitachi, Ltd.
Inventor: Takashi NAGAO , Tomohiro YOSHIHARA , Hiroki FUJII
IPC: G06F3/06
CPC classification number: G06F3/0622 , G06F3/0619 , G06F3/0631 , G06F3/0665 , G06F3/0683
Abstract: A storage controller manages a logical volume to which a host makes an access and which manages host data, an addition address space which is mapped with the logical volume and to which host data is added, and a physical address space which is mapped with the addition address space. In the addition address space, different address regions are allocated to respective parity groups. The storage controller selects, as an addition area of host data supplied from the host, an unoccupied address region in the addition address space. As the addition area, a region mapped to a normal status parity group in which data recovery is unnecessary is more preferentially selected than a region allocated to an abnormal status parity group in which data recovery is necessary.
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公开(公告)号:US20230136735A1
公开(公告)日:2023-05-04
申请号:US18083653
申请日:2022-12-19
Applicant: Hitachi, Ltd.
Inventor: Naoya OKADA , Takashi NAGAO , Kentaro SHIMADA , Ryosuke TATSUMI , Sadahiro SUGIMOTO
IPC: G06F3/06
Abstract: The present disclosure is to optimize processes in a storage system. A storage system includes: a first controller including a first computing device and a first memory; a second controller including a second computing device and a second memory; and an interface circuit that transfers data between the first controller and the second controller. The interface circuit reads first compressed data from the second memory. The interface circuit decompresses the first compressed data to generate first uncompressed data, and writes the first uncompressed data into the first memory.
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公开(公告)号:US20220308761A1
公开(公告)日:2022-09-29
申请号:US17692255
申请日:2022-03-11
Applicant: Hitachi, Ltd.
Inventor: Kenichi BETSUNO , Takashi NAGAO , Yuusaku KIYOTA , Tomohiro YOSHIHARA
IPC: G06F3/06
Abstract: Provided is a storage system including a plurality of controllers. The storage system adopts a write-once data storage system and can implement high Input/Output (I/O) processing performance while ensuring data consistency when a failure occurs. Before metadata duplication, recovery data including information necessary for performing roll forward or roll back is stored in each controller, and then the metadata duplication is performed. A recovery data storage processing and the metadata duplication are offloaded to a hardware accelerator.
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公开(公告)号:US20220229561A1
公开(公告)日:2022-07-21
申请号:US17716002
申请日:2022-04-08
Applicant: Hitachi, Ltd.
Inventor: Takashi NAGAO , Yuusaku KIYOTA , Hideaki MONJI , Tomohiro YOSHIHARA
IPC: G06F3/06
Abstract: A storage system having high reliability and IO processing performance is realized. The storage system includes: a first arithmetic unit configured to receive an input and output request and perform data input and output processing; a first memory connected to the first arithmetic unit; a plurality of storage drives configured to store data; a second arithmetic unit; and a second memory connected to the second arithmetic unit. The first arithmetic unit instructs the storage drive to read data, the storage drive reads the data and stores the data in the second memory, the second arithmetic unit stores the data stored in the second memory in the first memory, and the first arithmetic unit transmits the data stored in the first memory to a request source of a read request for the data.
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公开(公告)号:US20220164146A1
公开(公告)日:2022-05-26
申请号:US17472845
申请日:2021-09-13
Applicant: Hitachi, Ltd.
Inventor: Masahiro TSURUYA , Norio SHIMOZONO , Akira YAMAMOTO , Kentaro SHIMADA , Takashi NAGAO
IPC: G06F3/06
Abstract: A storage system includes: a controller which includes a processor and a memory; and one or more storage devices. The controller sets a plurality of logical volumes, stores data related to a write request in the memory when the write request is received in the logical volume, and collectively compresses a plurality of pieces of data related to the write request in the memory and writes the compressed data to the storage device. When a plurality of pieces of data related to a plurality of the logical volumes that need to be written to the storage device exist in the memory, the controller selects the plurality of pieces of data in an identical logical volume, and collectively compresses the plurality of pieces of selected data and writes the compressed data in the storage device.
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公开(公告)号:US20200151128A1
公开(公告)日:2020-05-14
申请号:US16546356
申请日:2019-08-21
Applicant: Hitachi, Ltd.
Inventor: Yuto KAMO , Ryosuke TATSUMI , Tomohiro YOSHIHARA , Takashi NAGAO
IPC: G06F13/28 , G06F12/0868
Abstract: An object of the present invention is to properly secure the consistency of data while suppressing a processing load of a controller on a processor. A storage system includes a plurality of controllers and an HCA that can directly access a memory and can communicate with the controllers. The controller includes a CPU, and a memory having a buffer region into which data is temporarily stored and a cache region into which data is cached. In the case where new data according to a write request is stored into the buffer region, the CPU of the controller sequentially transfers the new data to the cache regions using the HCA without passing through the other buffer regions.
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公开(公告)号:US20250094046A1
公开(公告)日:2025-03-20
申请号:US18608880
申请日:2024-03-18
Applicant: Hitachi, Ltd.
Inventor: Masahiro TSURUYA , Takashi NAGAO , Tomohiro YOSHIHARA
IPC: G06F3/06
Abstract: A storage system includes a controller and one or more storage devices, and the controller can compress data in different compression units, and collectively compresses data of one or a plurality of consecutive addresses in each compression unit of the different compression units. The controller receives write data, determines whether read of data stored in the one or more storage devices is necessary for compression of the write data by a first compression unit, determines compression of the write data in the first compression unit when read is not necessary, and determines compression in the first compression unit or compression in a second compression unit smaller than the first compression unit based on a remaining endurance of rewriting of the one or more storage devices when read is necessary.
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公开(公告)号:US20240176707A1
公开(公告)日:2024-05-30
申请号:US18119147
申请日:2023-03-08
Applicant: Hitachi, Ltd.
Inventor: Kazuki MATSUGAMI , Tomohiro YOSHIHARA , Takashi NAGAO
CPC classification number: G06F11/1464 , G06F3/0619 , G06F3/0653 , G06F3/0673 , G06F2201/84
Abstract: A data store volume (DSVOL) for a snapshot group which is a group of the PVOL and one or more SVOLs for the PVOL is a data storage region where data of which a storage destination is one volume (VOL) of the snapshot group and meta-information of the data are stored, and the meta-information is information including address mapping between a reference source address which is an address of a position of the data in the snapshot group and a reference destination address which is an address of a position of the data in the DSVOL. A process of a storage system increases the number of DSVOLs in the snapshot group when an input/output (I/O) load on the snapshot group exceeds a threshold.
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