公开(公告)号：US20210288657A1

公开(公告)日：2021-09-16

申请号：US17196627

申请日：2021-03-09

Applicant: Infineon Technologies AG

Inventor： Tien Thanh Ha ,  Chin Yeong Koh ,  Kiat How Tan

IPC: H03M1/08

Abstract: A device is provided comprising a first oscillator based analog-to-digital converter configured to receive an analog input signal and output a first digital signal and a second oscillator based analog-to-digital converter configured to receive an analog reference signal and output a second digital signal. The device further comprises output logic configured to generate a digital output signal based on the first digital signal and the second digital signal.

公开(公告)号：US09496888B1

公开(公告)日：2016-11-15

申请号：US14568239

申请日：2014-12-12

Applicant: Infineon Technologies AG

Inventor： Sunny Sharma ,  Chin Yeong Koh ,  Samaksh Sinha

IPC: H03M1/34 ,  H03M1/38 ,  H03M1/12 ,  H03M1/80 ,  H03M1/06 ,  H03M1/00

CPC classification number: H03M1/38 ,  H03M1/00 ,  H03M1/0692 ,  H03M1/0695 ,  H03M1/12 ,  H03M1/125 ,  H03M1/468 ,  H03M1/804

Abstract: Representative implementations of devices and techniques provide analog to digital conversion of time-discrete analog inputs. A redundant binary scaled capacitance arrangement using a successive approximation technique can provide a fast and power efficient ADC, with improved error correction. For example, a successive approximation capacitor arrangement may include multiple arrays of capacitances with binary bit weights. In an implementation, the technique includes processing the capacitances in successive cycles, where each cycle generates a binary error correction code representing greater than one bit of the digital output.

Abstract translation: 设备和技术的代表性实现提供时分离模拟输入的模数转换。 使用逐次逼近技术的冗余二进制缩放电容布置可以提供快速和功率效率的ADC，具有改进的纠错。 例如，逐次逼近电容器布置可以包括具有二进制位权重的多个电容阵列。 在一个实现中，该技术包括在连续周期中处理电容，其中每个周期产生代表数字输出的大于1位的二进制纠错码。

公开(公告)号：US09244485B1

公开(公告)日：2016-01-26

申请号：US14341214

申请日：2014-07-25

Applicant: Infineon Technologies AG

Inventor： Chin Yeong Koh

IPC: G06F1/04 ,  G06F1/08

CPC classification number: G06F1/08

Abstract: Devices, systems, and methods for spread spectrum clock generation are disclosed. The devices, systems, and methods generate a clock signal at a frequency and generate a voltage output based on the frequency of the clock signal, wherein the generated voltage output is indicative of the frequency of the generated clock signal. The devices, systems, and methods also compare the frequency of the clock signal generated to a desired frequency output by comparing the generated voltage output to a voltage reference and adjust the frequency of the clock signal generated based on the results of the comparison.

Abstract translation: 公开了用于扩频时钟产生的装置，系统和方法。 器件，系统和方法以频率产生时钟信号，并且基于时钟信号的频率产生电压输出，其中产生的电压输出指示所产生的时钟信号的频率。 器件，系统和方法还通过将所产生的电压输出与电压基准进行比较来比较产生的时钟信号与所需频率输出的频率，并根据比较结果调整产生的时钟信号的频率。