公开(公告)号：US10275598B2

公开(公告)日：2019-04-30

申请号：US14679145

申请日：2015-04-06

Applicant: Intel Corporation

Inventor： Vincent J. Zimmer ,  Bryant E. Bigbee ,  Andrew J. Fish ,  Mark S. Doran

IPC: G06F21/57 ,  G06F9/4401

Abstract: In one embodiment, the present invention includes a method to establish a secure pre-boot environment in a computer system and performs at least one secure operation in the secure environment. In one embodiment, the secure operation may be storage of a secret in the secure pre-boot environment.

公开(公告)号：US09448829B2

公开(公告)日：2016-09-20

申请号：US13730491

申请日：2012-12-28

Applicant: Intel Corporation

Inventor： Paolo Narvaez ,  Ganapati N. Srinivasa ,  Eugene Gorbatov ,  Dheeraj R. Subbareddy ,  Mishali Naik ,  Alon Naveh ,  Abirami Prabhakaran ,  Eliezer Weissmann ,  Paul Brett ,  Scott D. Hahn ,  Andrew J. Herdrich ,  Gaurav Khanna ,  Russell J. Fenger ,  Bryant E. Bigbee ,  Andrew D. Henroid ,  David A. Koufaty

IPC: G06F9/00 ,  G06F9/455 ,  G06F9/50 ,  G06F9/38

CPC classification number: G06F9/45558 ,  G06F9/3885 ,  G06F9/5077 ,  G06F2009/4557

Abstract: A heterogeneous processor architecture is described. For example, a processor according to one embodiment of the invention comprises: a set of two or more small physical processor cores; at least one large physical processor core having relatively higher performance processing capabilities and relatively higher power usage relative to the small physical processor cores; virtual-to-physical (V-P) mapping logic to expose the set of two or more small physical processor cores to software through a corresponding set of virtual cores and to hide the at least one large physical processor core from the software.

Abstract translation: 描述异构处理器架构。 例如，根据本发明的一个实施例的处理器包括：一组两个或更多个小物理处理器核; 至少一个大型物理处理器核具有相对较高性能的处理能力和相对较小的物理处理器核的相对较高的功率使用; 虚拟到物理（V-P）映射逻辑，以通过相应的一组虚拟核心将两个或更多个小物理处理器核心的集合暴露给软件，并从软件中隐藏至少一个大的物理处理器核心。

公开(公告)号：US09069605B2

公开(公告)日：2015-06-30

申请号：US14067223

申请日：2013-10-30

Applicant: Intel Corporation

Inventor： Richard A. Hankins ,  Hong Wang ,  Gautham N. Chinya ,  Trung A. Diep ,  Shivnandan D. Kaushik ,  Bryant E. Bigbee ,  John P. Shen ,  Asit K. Mallick ,  Baiju V. Patel ,  James Paul Held ,  Milind B. Girkar ,  Prashant Sethi ,  Xinmin Tian

IPC: G06F9/46 ,  G06F9/48

CPC classification number: G06F9/4843

Abstract: Method, apparatus and system embodiments to schedule OS-independent “shreds” without intervention of an operating system. For at least one embodiment, the shred is scheduled for execution by a scheduler routine rather than the operating system. A scheduler routine may run on each enabled sequencer. The schedulers may retrieve shred descriptors from a queue system. The sequencer associated with the scheduler may then execute the shred described by the descriptor. Other embodiments are also described and claimed.

Abstract translation: 方法，装置和系统实施例来调度不依赖于操作系统的OS无关的“碎片”。 对于至少一个实施例，碎片被调度为由调度器例程而不是操作系统执行。 调度程序例程可以在每个启用的顺控程序上运行。 调度器可以从队列系统检索碎片描述符。 与调度器相关联的定序器然后可以执行由描述符描述的碎片。 还描述和要求保护其他实施例。