公开(公告)号：US20190279949A1

公开(公告)日：2019-09-12

申请号：US16462197

申请日：2017-11-20

Applicant: Intel Corporation

Inventor： Jenny Shio Yin ONG ,  Tin Poay CHUAH ,  Chin Lee KUAN

IPC: H01L23/64 ,  H01L23/498 ,  H05K1/18

Abstract: A capacitor loop substrate assembly may include a substrate with a loop shape, one or more capacitors or other electronic components on the substrate, and an opening in the substrate to allow the capacitor loop substrate assembly to be coupled to an integrated circuit package, such as a package including a die. Interconnects and/or contacts for interconnects may be formed in an integrated circuit package to couple the capacitor loop substrate assembly to the integrated circuit package.

公开(公告)号：US20190208643A1

公开(公告)日：2019-07-04

申请号：US16325659

申请日：2016-09-30

Applicant: Intel Corporation

Inventor： Tin Poay CHUAH ,  Min Suet LIM ,  Hoay Tien TEOH ,  Mooi Ling CHANG ,  Chin Lee KUAN

IPC: H05K3/00 ,  H05K1/18 ,  H05K3/34

CPC classification number: H05K3/0035 ,  H05K1/184 ,  H05K3/341 ,  H05K2201/09072 ,  H05K2201/10454 ,  H05K2203/0126 ,  H05K2203/1438

Abstract: A printed circuit board (PCB) comprises a blind via and a discrete component vertically embedded within the blind via.

公开(公告)号：US20180123514A1

公开(公告)日：2018-05-03

申请号：US15469499

申请日：2017-03-25

Applicant: INTEL CORPORATION

Inventor： Khang Choong YONG ,  Raymond CHONG ,  Ramaswamy PARTHASARATHY ,  Stephen HALL ,  Chin Lee KUAN

IPC: H03B5/32 ,  H03L7/099

CPC classification number: H03B5/32 ,  H03B2200/0088 ,  H03L7/06

Abstract: An apparatus is provided which comprises: a crystal having an input and an output; a first interconnect line having first and second ends, wherein the first end is coupled to the input; a second interconnect line having first and second ends, wherein the first end is coupled to the output; a first capacitor coupled to the input and ground; and a second capacitor coupled to the second end of the second interconnect line. An apparatus is provided which comprises: a high pass filter; a pair of AC coupling capacitors coupled to the high pass filter; a low pass filter coupled to the pair of AC coupling capacitors; and an analog to digital converter (ADC) coupled to the low pass filter.