公开(公告)号：US20190043796A1

公开(公告)日：2019-02-07

申请号：US16017710

申请日：2018-06-25

Applicant: Intel Corporation

Inventor： Zhen ZHOU ,  Jun LIAO ,  Xiang LI ,  Kevin STONE ,  Tom DU ,  Tae-Young YANG ,  Ling ZHENG ,  James A. McCALL

IPC: H01L23/498 ,  H01R12/71 ,  H01R12/52 ,  H01R43/20 ,  H01R43/16 ,  H01R12/57

Abstract: An apparatus is described. The apparatus includes an electro-mechanical interface having angled signal interconnects, wherein, the angling of the signal interconnects is to reduce noise coupling between the angled signal interconnects.

公开(公告)号：US20220368047A1

公开(公告)日：2022-11-17

申请号：US17874111

申请日：2022-07-26

Applicant: Intel Corporation

Inventor： George VERGIS ,  Xiang LI ,  Jun LIAO ,  Anthony M. CONSTANTINE ,  Min Suet LIM ,  Tongyan ZHAI ,  Konika GANGULY

IPC: H01R12/72 ,  G06F1/18 ,  H01R13/24 ,  H01R12/70

Abstract: An adapter card with compression-attached memory modules that can be inserted into a conventional vertical connector enables use of CAMMs in systems with vertical memory module connectors. In one example, an adapter card or riser card includes a printed circuit board (PCB) having an edge to be received by a dual-inline memory module (DIMM) connector. First conductive contacts proximate to the edge of the PCB are to be received by the DIMM connector, enabling the first conductive contacts to couple with contacts of the DIMM connector. Second conductive contacts on a face of the PCB are to couple with a first compression attached memory module (CAMM) via a first compression mount technology (CMT) connector. The adapter card includes conductive traces on or in the PCB between the first conductive contacts and the second conductive contacts to couple the CAMM with the DIMM connector.

公开(公告)号：US20190045622A1

公开(公告)日：2019-02-07

申请号：US15817098

申请日：2017-11-17

Applicant: Intel Corporation

Inventor： Jun LIAO ,  Zhen ZHOU ,  James A. McCALL ,  Jong-Ru GUO ,  Xiang LI ,  Yunhui CHU ,  Zuoguo WU

IPC: H05K1/02 ,  H05K1/14

Abstract: An apparatus is described. The apparatus includes a semiconductor chip having cross-talk noise cancellation circuitry disposed between a disturber trace and a trace to be protected from cross-talk noise emanating from the disturber trace. The trace is to be coupled to a receiver disposed on a different semiconductor chip.