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    Technique for providing multiple stress sources in NMOS and PMOS transistors
    13.
    发明授权
    Technique for providing multiple stress sources in NMOS and PMOS transistors 有权
    在NMOS和PMOS晶体管中提供多个应力源的技术

    公开(公告)号：US07329571B2

    公开(公告)日：2008-02-12

    申请号：US11466802

    申请日：2006-08-24

    申请人： Jan Hoentschel ,  Andy Wei ,  Manfred Horstmann ,  Thorsten Kammler

    发明人： Jan Hoentschel ,  Andy Wei ,  Manfred Horstmann ,  Thorsten Kammler

    IPC分类号： H01L21/8238 ,  H01L21/336 ,  H01L21/44

    CPC分类号： H01L21/84 ,  H01L21/823807 ,  H01L21/823864 ,  H01L27/1203 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/66628 ,  H01L29/7843 ,  H01L29/7848 ,  H01L29/78618 ,  H01L29/78684

    摘要： By combining a plurality of stress inducing mechanisms in each of different types of transistors, a significant performance gain may be obtained, thereby providing enhanced flexibility in adjusting product specific characteristics. For this purpose, sidewall spacers with high tensile stress may be commonly formed on PMOS and NMOS transistors, wherein a deleterious effect on the PMOS transistor may be compensated for by a corresponding compressively stressed contact etch stop layer, while the NMOS transistor comprises a contact etch stop layer with tensile stress. Furthermore, the PMOS transistor comprises an embedded strained semiconductor layer for efficiently creating compressive strain in the channel region.

    摘要翻译： 通过在不同类型的晶体管中组合多个应力诱导机构，可以获得显着的性能增益，从而在调整产品特定特性方面提供增强的灵活性。 为此，可以在PMOS和NMOS晶体管上通常形成具有高拉伸应力的侧壁间隔物，其中可以通过相应的压缩应力接触蚀刻停止层补偿对PMOS晶体管的有害影响，而NMOS晶体管包括接触蚀刻 停止层拉伸应力。 此外，PMOS晶体管包括用于在沟道区域中有效地产生压缩应变的嵌入式应变半导体层。

    TECHNIQUE FOR PROVIDING MULTIPLE STRESS SOURCES IN NMOS AND PMOS TRANSISTORS
    14.
    发明申请
    TECHNIQUE FOR PROVIDING MULTIPLE STRESS SOURCES IN NMOS AND PMOS TRANSISTORS 有权
    在NMOS和PMOS晶体管中提供多个应力源的技术

    公开(公告)号：US20070096195A1

    公开(公告)日：2007-05-03

    申请号：US11466802

    申请日：2006-08-24

    申请人： Jan Hoentschel ,  Andy Wei ,  Manfred Horstmann ,  Thorsten Kammler

    发明人： Jan Hoentschel ,  Andy Wei ,  Manfred Horstmann ,  Thorsten Kammler

    IPC分类号： H01L29/788 ,  H01L21/336

    CPC分类号： H01L21/84 ,  H01L21/823807 ,  H01L21/823864 ,  H01L27/1203 ,  H01L29/165 ,  H01L29/665 ,  H01L29/6656 ,  H01L29/66628 ,  H01L29/7843 ,  H01L29/7848 ,  H01L29/78618 ,  H01L29/78684

    摘要： By combining a plurality of stress inducing mechanisms in each of different types of transistors, a significant performance gain may be obtained, thereby providing enhanced flexibility in adjusting product specific characteristics. For this purpose, sidewall spacers with high tensile stress may be commonly formed on PMOS and NMOS transistors, wherein a deleterious effect on the PMOS transistor may be compensated for by a corresponding compressively stressed contact etch stop layer, while the NMOS transistor comprises a contact etch stop layer with tensile stress. Furthermore, the PMOS transistor comprises an embedded strained semiconductor layer for efficiently creating compressive strain in the channel region.

    摘要翻译： 通过在不同类型的晶体管中组合多个应力诱导机构，可以获得显着的性能增益，从而在调整产品特定特性方面提供增强的灵活性。 为此，可以在PMOS和NMOS晶体管上通常形成具有高拉伸应力的侧壁间隔物，其中可以通过相应的压缩应力接触蚀刻停止层补偿对PMOS晶体管的有害影响，而NMOS晶体管包括接触蚀刻 停止层拉伸应力。 此外，PMOS晶体管包括用于在沟道区域中有效地产生压缩应变的嵌入式应变半导体层。

    Method of forming a field effect transistor
    16.
    发明授权
    Method of forming a field effect transistor 有权
    形成场效应晶体管的方法

    公开(公告)号：US07723195B2

    公开(公告)日：2010-05-25

    申请号：US11566287

    申请日：2006-12-04

    申请人： Andy Wei ,  Thorsten Kammler ,  Jan Hoentschel ,  Manfred Horstmann

    发明人： Andy Wei ,  Thorsten Kammler ,  Jan Hoentschel ,  Manfred Horstmann

    IPC分类号： H01L21/336

    CPC分类号： H01L29/66621 ,  H01L29/165 ,  H01L29/66583 ,  H01L29/7834 ,  H01L29/7848

    摘要： A method of forming a field effect transistor comprises providing a substrate comprising a biaxially strained layer of a semiconductor material. A gate electrode is formed on the biaxially strained layer of semiconductor material. A raised source region and a raised drain region are formed adjacent the gate electrode. Ions of a dopant material are implanted into the raised source region and the raised drain region to form an extended source region and an extended drain region. Moreover, in methods of forming a field effect transistor according to embodiments of the present invention, a gate electrode can be formed in a recess of a layer of semiconductor material. Thus, a field effect transistor wherein a source side channel contact region and a drain side channel contact region located adjacent a channel region are subject to biaxial strain can be obtained.

    摘要翻译： 形成场效应晶体管的方法包括提供包括半导体材料的双轴应变层的衬底。 在半导体材料的双轴应变层上形成栅电极。 在栅电极附近形成凸起的源区和升高的漏极区。 将掺杂剂材料的离子注入到凸起的源极区域和隆起的漏极区域中，以形成扩展的源极区域和延伸的漏极区域。 此外，在形成根据本发明的实施例的场效应晶体管的方法中，可以在半导体材料层的凹部中形成栅电极。 因此，可以获得其中位于沟道区附近的源极侧沟道接触区域和漏极侧沟道接触区域受到双轴应变的场效应晶体管。

    Method of forming a field effect transistor
    18.
    发明申请
    Method of forming a field effect transistor 有权
    形成场效应晶体管的方法

    公开(公告)号：US20070254441A1

    公开(公告)日：2007-11-01

    申请号：US11566287

    申请日：2006-12-04

    申请人： Andy Wei ,  Thorsten Kammler ,  Jan Hoentschel ,  Manfred Horstmann

    发明人： Andy Wei ,  Thorsten Kammler ,  Jan Hoentschel ,  Manfred Horstmann

    IPC分类号： H01L21/336

    CPC分类号： H01L29/66621 ,  H01L29/165 ,  H01L29/66583 ,  H01L29/7834 ,  H01L29/7848

    摘要： A method of forming a field effect transistor comprises providing a substrate comprising a biaxially strained layer of a semiconductor material. A gate electrode is formed on the biaxially strained layer of semiconductor material. A raised source region and a raised drain region are formed adjacent the gate electrode. Ions of a dopant material are implanted into the raised source region and the raised drain region to form an extended source region and an extended drain region. Moreover, in methods of forming a field effect transistor according to embodiments of the present invention, a gate electrode can be formed in a recess of a layer of semiconductor material. Thus, a field effect transistor wherein a source side channel contact region and a drain side channel contact region located adjacent a channel region are subject to biaxial strain can be obtained.

    摘要翻译： 形成场效应晶体管的方法包括提供包括半导体材料的双轴应变层的衬底。 在半导体材料的双轴应变层上形成栅电极。 在栅电极附近形成凸起的源区和升高的漏极区。 将掺杂剂材料的离子注入到凸起的源极区域和隆起的漏极区域中，以形成扩展的源极区域和延伸的漏极区域。 此外，在形成根据本发明的实施例的场效应晶体管的方法中，可以在半导体材料层的凹部中形成栅电极。 因此，可以获得其中位于沟道区附近的源极侧沟道接触区域和漏极侧沟道接触区域受到双轴应变的场效应晶体管。

    Method of forming a field effect transistor
    19.
    发明授权
    Method of forming a field effect transistor 有权
    形成场效应晶体管的方法

    公开(公告)号：US08440516B2

    公开(公告)日：2013-05-14

    申请号：US12752487

    申请日：2010-04-01

    申请人： Andy Wei ,  Thorsten Kammler ,  Jan Hoentschel ,  Manfred Horstmann

    发明人： Andy Wei ,  Thorsten Kammler ,  Jan Hoentschel ,  Manfred Horstmann

    IPC分类号： H01L21/8234

    CPC分类号： H01L29/66621 ,  H01L29/165 ,  H01L29/66583 ,  H01L29/7834 ,  H01L29/7848

    摘要： A method of forming a field effect transistor comprises providing a substrate comprising a biaxially strained layer of a semiconductor material. A gate electrode is formed on the biaxially strained layer of semiconductor material. A raised source region and a raised drain region are formed adjacent the gate electrode. Ions of a dopant material are implanted into the raised source region and the raised drain region to form an extended source region and an extended drain region. Moreover, in methods of forming a field effect transistor according to embodiments of the present invention, a gate electrode can be formed in a recess of a layer of semiconductor material. Thus, a field effect transistor wherein a source side channel contact region and a drain side channel contact region located adjacent a channel region are subject to biaxial strain can be obtained.

    摘要翻译： 形成场效应晶体管的方法包括提供包括半导体材料的双轴应变层的衬底。 在半导体材料的双轴应变层上形成栅电极。 在栅电极附近形成凸起的源区和升高的漏极区。 将掺杂剂材料的离子注入到凸起的源极区域和隆起的漏极区域中，以形成扩展的源极区域和延伸的漏极区域。 此外，在形成根据本发明的实施例的场效应晶体管的方法中，可以在半导体材料层的凹部中形成栅电极。 因此，可以获得其中位于沟道区附近的源极侧沟道接触区域和漏极侧沟道接触区域受到双轴应变的场效应晶体管。