Data State-Dependent Channel Boosting To Reduce Channel-To-Floating Gate Coupling In Memory
    12.
    发明申请
    Data State-Dependent Channel Boosting To Reduce Channel-To-Floating Gate Coupling In Memory 有权
    数据状态相关通道增强,以减少存储器中的通道到浮动栅极耦合

    公开(公告)号:US20120182809A1

    公开(公告)日:2012-07-19

    申请号:US13428305

    申请日:2012-03-23

    IPC分类号: G11C16/10

    摘要: In a programming operation, selected storage elements on a selected word line are programmed while unselected storage elements on the selected word line are inhibited from programming by channel boosting. To provide a sufficient but not excessive level of boosting, the amount of boosting can be set based on a data state of the unselected storage element. A greater amount of boosting can be provided for a lower data state which represents a lower threshold voltage and hence is more vulnerable to program disturb. A common boosting scheme can be used for groups of multiple data states. The amount of boosting can be set by adjusting the timing and magnitude of voltages used for a channel pre-charge operation and for pass voltages which are applied to word lines. In one approach, stepped pass voltages on unselected word lines can be used to adjust boosting for channels with selected data states.

    摘要翻译: 在编程操作中,选择的字线上的所选择的存储元件被编程,同时通过通道增强来禁止所选字线上的未选择的存储元件的编程。 为了提供足够但不是过高的升压水平,可以基于未选择的存储元件的数据状态来设定升压量。 可以为代表较低阈值电压的较低数据状态提供更大量的升压,因此更易受编程干扰的影响。 一个共同的升压方案可以用于多个数据状态的组。 可以通过调整用于通道预充电操作的电压的时序和幅度以及施加到字线的通过电压来设置升压量。 在一种方法中,可以使用未选择字线上的阶梯式通过电压来调整具有所选数据状态的通道的升压。

    Reduced programming pulse width for enhanced channel boosting in non-volatile storage
    13.
    发明授权
    Reduced programming pulse width for enhanced channel boosting in non-volatile storage 有权
    降低编程脉冲宽度,增强非易失性存储器中的通道增强

    公开(公告)号:US08045384B2

    公开(公告)日:2011-10-25

    申请号:US12488967

    申请日:2009-06-22

    IPC分类号: G11C16/04

    CPC分类号: G11C16/10

    摘要: Program disturb is reduced in a non-volatile storage system during a programming operation by switching from using programming pulses of a longer duration to programming pulses of a shorter duration, partway through the programming operation. A switchover point can be based on temperature, selected word line position and/or tracking of storage elements to a trigger state. The switchover point occurs sooner for higher temperatures, and for drain side word lines. The trigger state can be selected based on temperature. A portion of storage elements which are required to reach the trigger state to trigger a switchover can also be set a function of temperature. Programming pulses of a shorter duration improve channel boosting for inhibited storage elements, thereby reducing program disturb for these storage elements.

    摘要翻译: 在编程操作期间,通过从较长持续时间的编程脉冲切换到具有较短持续时间的编程脉冲在编程操作中的一部分,在非易失性存储系统中减少了编程干扰。 切换点可以基于温度,选择的字线位置和/或将存储元件的跟踪触发到触发状态。 对于较高的温度和排水侧字线,切换点会更早出现。 可以根据温度选择触发状态。 达到触发状态以触发切换所需的一部分存储元件也可以被设置为温度的函数。 较短持续时间的编程脉冲改善了禁止存储元件的信道增强,从而减少了这些存储元件的编程干扰。

    SEGMENTED BITSCAN FOR VERIFICATION OF PROGRAMMING
    14.
    发明申请
    SEGMENTED BITSCAN FOR VERIFICATION OF PROGRAMMING 有权
    SEGMENTED BITSCAN用于验证编程

    公开(公告)号:US20110141819A1

    公开(公告)日:2011-06-16

    申请号:US13035539

    申请日:2011-02-25

    IPC分类号: G11C16/10

    摘要: A set non-volatile storage elements are subjected to a programming process in order to store a set of data. During the programming process, one or more verification operations are performed to determine whether the non-volatile storage elements have reached their target condition to store the appropriate data. Decisions about whether to continue programming or whether the programming is successful are made based on whether overlapping groups of the non-volatile storage elements have less than a threshold number of non-volatile storage elements that are not properly programmed.

    摘要翻译: 一组非易失性存储元件经受编程处理以便存储一组数据。 在编程过程中,执行一个或多个验证操作以确定非易失性存储元件是否已经达到其目标条件以存储适当的数据。 关于是继续编程还是编程成功的决定是基于非易失性存储元件的重叠组是否具有小于非正确编程的非易失性存储元件的阈值数量来进行。

    REDUCED PROGRAMMING PULSE WIDTH FOR ENHANCED CHANNEL BOOSTING IN NON-VOLATILE STORAGE
    15.
    发明申请
    REDUCED PROGRAMMING PULSE WIDTH FOR ENHANCED CHANNEL BOOSTING IN NON-VOLATILE STORAGE 有权
    减少编程脉冲宽度,提高非易失性存储的通道增量

    公开(公告)号:US20100322005A1

    公开(公告)日:2010-12-23

    申请号:US12488967

    申请日:2009-06-22

    IPC分类号: G11C16/04

    CPC分类号: G11C16/10

    摘要: Program disturb is reduced in a non-volatile storage system during a programming operation by switching from using programming pulses of a longer duration to programming pulses of a shorter duration, partway through the programming operation. A switchover point can be based on temperature, selected word line position and/or tracking of storage elements to a trigger state. The switchover point occurs sooner for higher temperatures, and for drain side word lines. The trigger state can be selected based on temperature. A portion of storage elements which are required to reach the trigger state to trigger a switchover can also be set a function of temperature. Programming pulses of a shorter duration improve channel boosting for inhibited storage elements, thereby reducing program disturb for these storage elements.

    摘要翻译: 在编程操作期间,通过从较长持续时间的编程脉冲切换到具有较短持续时间的编程脉冲在编程操作中的一部分,在非易失性存储系统中减少了编程干扰。 切换点可以基于温度,选择的字线位置和/或将存储元件的跟踪触发到触发状态。 对于较高的温度和排水侧字线,切换点会更早出现。 可以根据温度选择触发状态。 达到触发状态以触发切换所需的一部分存储元件也可以被设置为温度的函数。 较短持续时间的编程脉冲改善了禁止存储元件的信道增强,从而减少了这些存储元件的编程干扰。

    ENHANCED BIT-LINE PRE-CHARGE SCHEME FOR INCREASING CHANNEL BOOSTING IN NON-VOLATILE STORAGE
    17.
    发明申请
    ENHANCED BIT-LINE PRE-CHARGE SCHEME FOR INCREASING CHANNEL BOOSTING IN NON-VOLATILE STORAGE 有权
    增强非易失性存储器中的通道增强的双线预先计费方案

    公开(公告)号:US20090290429A1

    公开(公告)日:2009-11-26

    申请号:US12126375

    申请日:2008-05-23

    IPC分类号: G11C16/06

    摘要: Channel boosting is improved in non-volatile storage to reduce program disturb. A pre-charge module voltage source is used to pre-charge bit lines during a programming operation. The pre-charge module voltage source is coupled to a substrate channel via the bit lines to boost the channel. An additional source of boosting is provided by electromagnetically coupling a voltage from a conductive element to the bit lines and the channel. To achieve this, the bit lines and the channel are allowed to float together by disconnecting the bit lines from the voltage sources. The conductive element can be a source line, power supply line or substrate body, for instance, which receives an increasing voltage during the pre-charging and is proximate to the bit lines.

    摘要翻译: 在非易失性存储器中改善通道增强以减少程序干扰。 预充电模块电压源用于在编程操作期间对位线进行预充电。 预充电模块电压源通过位线耦合到衬底通道以升高通道。 通过将来自导电元件的电压电磁耦合到位线和通道来提供额外的升压源。 为了实现这一点,通过将位线与电压源断开来允许位线和通道浮动在一起。 导电元件可以是例如在预充电期间接收增加的电压并且靠近位线的源极线,电源线或衬底主体。

    Retention margin program verification
    18.
    发明授权
    Retention margin program verification 有权
    保留保证金计划验证

    公开(公告)号:US07616499B2

    公开(公告)日:2009-11-10

    申请号:US11617541

    申请日:2006-12-28

    IPC分类号: G11C11/34 G11C16/04 G11C16/06

    摘要: Data verification in a memory device using a portion of a data retention margin is provided. A bit count is read from the region to determine whether errors will result in the memory. A read in one or more retention margin portions is performed after the normal program verify sequence and if the number of bits in these regions is more than a pre-set the memory will fail verify status. A method of verifying data in a memory device includes the steps of: defining an retention margin between adjacent data thresholds; programming the memory device with data; determining whether bits are present in the data retention margin; and if the number of bits in the retention margin exceeds a threshold, generating an error.

    摘要翻译: 提供了使用部分数据保留余量的存储器件中的数据验证。 从区域读取位计数,以确定错误是否会导致内存。 在正常程序验证序列之后执行在一个或多个保留边缘部分中的读取,并且如果这些区域中的位数大于预设,则存储器将失败验证状态。 验证存储器件中的数据的方法包括以下步骤:定义相邻数据阈值之间的保留余量; 使用数据对存储设备进行编程; 确定位是否存在于数据保留余量中; 并且如果保留余量中的比特数超过阈值,则产生错误。

    BOOSTING FOR NON-VOLATILE STORAGE USING CHANNEL ISOLATION SWITCHING
    19.
    发明申请
    BOOSTING FOR NON-VOLATILE STORAGE USING CHANNEL ISOLATION SWITCHING 有权
    使用通道隔离开关来促进非易失性存储

    公开(公告)号:US20080279007A1

    公开(公告)日:2008-11-13

    申请号:US11745082

    申请日:2007-05-07

    IPC分类号: G11C11/34

    CPC分类号: G11C16/12 G11C16/0483

    摘要: Program disturb is reduced in non-volatile storage by preventing source side boosting in selected NAND strings. A self-boosting mode which includes an isolation word line is used. A channel area of an inhibited NAND string is boosted on a source side of the isolation word line before the channel is boosted on a drain side of the isolation word line. Further, storage elements near the isolation word line are kept in a conducting state during the source side boosting so that the source side channel is connected to the drain side channel. In this way, in selected NAND strings, source side boosting can not occur and thus program disturb due to source side boosting can be prevented. After the source side boosting, the source side channel is isolated from the drain side channel, and drain side boosting is performed.

    摘要翻译: 在非易失性存储器中通过防止所选择的NAND串中的源极升压来减少编程干扰。 使用包括隔离字线的自增强模式。 禁止的NAND串的通道区域在隔离字线的漏极侧的通道升压之前在隔离字线的源极侧被升压。 此外,在源侧升压期间,隔离字线附近的存储元件保持导通状态,使得源极侧沟道连接到漏极侧沟道。 以这种方式,在选择的NAND串中,不能发生源侧升压,因此可以防止由于源极侧升压而导致的编程干扰。 在源侧升压之后,源侧沟道与漏极侧沟道隔离,并且进行漏极侧升压。

    PROGRAMMING NON-VOLATILE MEMORY WITH REDUCED PROGRAM DISTURB BY USING DIFFERENT PRE-CHARGE ENABLE VOLTAGES
    20.
    发明申请
    PROGRAMMING NON-VOLATILE MEMORY WITH REDUCED PROGRAM DISTURB BY USING DIFFERENT PRE-CHARGE ENABLE VOLTAGES 有权
    通过使用不同的预充电电压编程减少程序干扰的非易失性存储器

    公开(公告)号:US20080159004A1

    公开(公告)日:2008-07-03

    申请号:US11618600

    申请日:2006-12-29

    IPC分类号: G11C16/06

    摘要: Unselected groups of non-volatile storage elements are boosted during programming to reduce or eliminate program disturb for targeted, but unselected memory cells connected to a selected word line. Prior to applying a program voltage to the selected word line and boosting the unselected groups, the unselected groups are pre-charged to further reduce or eliminate program disturb by providing a larger boosted potential for the unselected groups. During pre-charging, one or more pre-charge enable signals are provided at different voltages for particular non-volatile storage elements.

    摘要翻译: 在编程期间,未选择的非易失性存储元件组被提升以减少或消除连接到所选字线的目标但未选择的存储器单元的程序干扰。 在将程序电压施加到所选择的字线并升高未选择的组之前,未选择的组被预先充电,以通过为未选择的组提供更大的增强电位来进一步减少或消除程序干扰。 在预充电期间,对于特定的非易失性存储元件,以不同的电压提供一个或多个预充电使能信号。