公开(公告)号：US08039401B2

公开(公告)日：2011-10-18

申请号：US12332326

申请日：2008-12-10

申请人： Qi Wang ,  Joelle Sharp ,  Minhua Li ,  Hui Chen

发明人： Qi Wang ,  Joelle Sharp ,  Minhua Li ,  Hui Chen

IPC分类号： H01L21/30 ,  H01L21/46 ,  H01L21/20 ,  H01L21/36 ,  H01L21/311

CPC分类号： H01L29/045 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02532 ,  H01L21/02609 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02642 ,  H01L29/7802 ,  H01L29/7813 ,  H01L2924/0002 ,  H01L2924/00

摘要： A first and a second substrate are bonded together to thereby form a unitary hybrid substrate. Predefined portions of the first substrate are removed to form openings in the first substrate through which surface regions of the second substrate are exposed. A selective epitaxial growth process that is selective with respect to the crystalline orientations of the first and second substrates is carried out to thereby form epitaxial silicon from the exposed surfaces of the second substrate but not from exposed surfaces of the first substrate. The epitaxial silicon formed from the exposed surfaces of the second substrate has the same crystalline orientation as the second substrate.

摘要翻译： 将第一基板和第二基板接合在一起形成单一的混合基板。 去除第一衬底的预定部分，以在第一衬底中形成开口，第二衬底的表面区域暴露在第一衬底中。 执行相对于第一和第二衬底的晶体取向选择性的选择性外延生长工艺，从而从第二衬底的暴露表面形成外延硅，但不从第一衬底的暴露表面形成外延硅。 由第二衬底的暴露表面形成的外延硅具有与第二衬底相同的晶体取向。

公开(公告)号：US20090253237A1

公开(公告)日：2009-10-08

申请号：US12485290

申请日：2009-06-16

申请人： Qi Wang ,  Ming-Huang Huang ,  Joelle Sharp

发明人： Qi Wang ,  Ming-Huang Huang ,  Joelle Sharp

IPC分类号： H01L21/336

CPC分类号： H01L29/66636 ,  H01L29/165 ,  H01L29/66621 ,  H01L29/7834

摘要： A method for forming a field effect transistor (FET) includes the following steps. A well region of a first conductivity type is formed in a semiconductor region of a second conductivity type. A gate electrode is formed adjacent to but insulated from the well region. A source region of the second conductivity type is formed in the well region. A heavy body recess is formed extending into and terminating within the well region adjacent the source region. The heavy body recess is at least partially filled with a heavy body material having a lower energy gap than the well region.

摘要翻译： 形成场效应晶体管（FET）的方法包括以下步骤。 第一导电类型的阱区形成在第二导电类型的半导体区域中。 栅极电极形成为邻近但与阱区绝缘。 第二导电类型的源区形成在阱区中。 形成一个沉重的身体凹陷，延伸到与源区相邻的井区内和终止。 重体凹部至少部分地被具有比井区域更低的能隙的重体材料填充。

公开(公告)号：US20080191248A1

公开(公告)日：2008-08-14

申请号：US11673487

申请日：2007-02-09

申请人： Qi Wang ,  Ming-Huang Huang ,  Joelle Sharp

发明人： Qi Wang ,  Ming-Huang Huang ,  Joelle Sharp

IPC分类号： H01L29/94

CPC分类号： H01L29/66636 ,  H01L29/165 ,  H01L29/66621 ,  H01L29/7834

摘要： A field effect transistor (FET) includes a semiconductor region of a first conductivity type and a well region of a second conductivity type extending over the semiconductor region. A gate electrode is adjacent to but insulated from the well region, and a source region of the first conductivity type is in the well region. A heavy body region is in electrical contact with the well region, and includes a material having a lower energy gap than the well region.

摘要翻译： 场效应晶体管（FET）包括在半导体区域上延伸的第一导电类型的半导体区域和第二导电类型的阱区域。 栅电极与阱区相邻但绝缘，并且第一导电类型的源极区在阱区中。 重体区域与阱区电接触，并且包括具有比阱区更低的能隙的材料。

公开(公告)号：US06825087B1

公开(公告)日：2004-11-30

申请号：US09448884

申请日：1999-11-24

申请人： Joelle Sharp ,  Gordon K. Madson

发明人： Joelle Sharp ,  Gordon K. Madson

IPC分类号： H01L21336

CPC分类号： H01L29/7813 ,  H01L21/324 ,  H01L21/3247

摘要： A method of forming a trench in a substrate or in an epitaxial layer, previously grown over the semiconductor substrate, wherein an anneal step, using hydrogen gas results in rounded corners without the need for a rounding etch or any other processing steps to round the corners.

摘要翻译： 在半导体衬底上预先生长的衬底或外延层中形成沟槽的方法，其中使用氢气的退火步骤产生圆角，而不需要舍入蚀刻或任何其他处理步骤来绕圆角 。

公开(公告)号：US06576954B2

公开(公告)日：2003-06-10

申请号：US10071792

申请日：2002-02-06

申请人： Gordon K. Madson ,  Joelle Sharp

发明人： Gordon K. Madson ,  Joelle Sharp

IPC分类号： H01L2976

CPC分类号： H01L29/7813 ,  H01L21/823487 ,  H01L29/42368

摘要： A method of creating a thermally grown oxide of any thickness at the bottom of a silicon trench. A dielectric (e.g. oxide) pillar of a predetermined thickness is formed on a semiconductor substrate. A selective epitaxial growth (SEG) process is used to form an epitaxial layer around and over the oxide pillars. A trench is patterned and etched through the SEG layer and in alignment with the oxide pillar such that the trench terminates at the top of the oxide pillar.

公开(公告)号：US06391699B1

公开(公告)日：2002-05-21

申请号：US09586720

申请日：2000-06-05

申请人： Gordon K. Madson ,  Joelle Sharp

发明人： Gordon K. Madson ,  Joelle Sharp

IPC分类号： H01L218238

CPC分类号： H01L29/7813 ,  H01L21/823487 ,  H01L29/42368

摘要： A method of creating a thermally grown oxide of any thickness at the bottom of a silicon trench. A dielectric (e.g. oxide) pillar of a predetermined thickness is formed on a semiconductor substrate. A selective epitaxial growth (SEG) process is used to form an epitaxial layer around and over the oxide pillars. A trench is patterned and etched through the SEG layer and in alignment with the oxide pillar such that the trench terminates at the top of the oxide pillar.

摘要翻译： 一种在硅沟底部产生任何厚度的热生长氧化物的方法。 在半导体衬底上形成预定厚度的电介质（例如氧化物）柱。 使用选择性外延生长（SEG）工艺在氧化物柱周围形成外延层。 将沟槽图案化并蚀刻穿过SEG层并与氧化物柱对齐，使得沟槽终止于氧化物柱的顶部。