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公开(公告)号:US11967371B2
公开(公告)日:2024-04-23
申请号:US17806346
申请日:2022-06-10
Applicant: Kioxia Corporation
Inventor: Rieko Funatsuki , Takashi Maeda , Hidehiro Shiga
CPC classification number: G11C11/5642 , G11C11/5628 , G11C11/5671 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/26 , G11C16/3459
Abstract: A semiconductor memory device includes i first word lines connected to the i first memory cells, i second word lines connected to the i second memory cells, a driver capable of supplying voltage to each of the i first word lines and each of the i second word lines, and a logic control circuit controlling both a write operation including a verify operation and a read operation including a verify operation. In the semiconductor memory device, when an order of performing a sense operation for determining whether or not a threshold voltage of the k-th first memory cell has reached a j-th threshold voltage in the verify operation is different from that of in the read operation, a voltage applied to the k-th first word line in the verify operation is different from a voltage applied to the k-th first word line in the read operation.