Abstract:
An automation and platform management system for navel vessels configured to be operated from a multimedia information and operation control center. This automation and management system has a system for monitoring and commanding the ship, a system for navigating the ship, a system for coordinating weapons deployment, a system for handling the external and internal radio communications, a system for controlling and handling the information distribution, a system for power generation and distribution (power management monitoring), and a system for monitoring ship operations. To be able further to reduce the number of crewmembers of a ship equipped with the automation and management system, the automation and management system further has a system for automated ship damage control and/or an integrated onboard information and data network (2) and/or an integrated system for monitoring and control of a COPAW drive of the ship.
Abstract:
Am improved method for changing the image scale for a lithographic arrangement comprising a synchroton radiation creating a collimated beam of x-radiation passing through a mask onto an object to be structured, characterized by deforming the surface to be structured into a curved surface. The deforming into a curved surface can be either into a cylindrical curved surface or into a spherical curved surface.
Abstract:
An arrangement and method for the exact, mutual alignment of a mask and a semiconductor wafer in a lithographic apparatus so that the mask and wafer are in a plane extending perpendicular to the particle beam. The apparatus includes a seating arrangement for the mask having a first retaining part and arrangement for positioning this first retaining part relative to a table which allows adjusting the plane of the first retaining part. The apparatus also includes a second retaining part for securing the wafer thereto, which second retaining part is mounted on the plate by an arrangement that allows adjusting the plane of the second retaining part relative to the axis so that the surface of the semiconductor wafer can also be placed in a plane extending perpendicular to the beam direction.
Abstract:
Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a semiconductor device includes a workpiece having a buried layer disposed beneath a top portion thereof. A trench is disposed in the workpiece extending at least through the buried layer. At least one sinker contact is disposed in the top portion of the workpiece. The at least one sinker contact is proximate sidewalls of at least a portion of the trench and is adjacent the buried layer. An insulating material is disposed on the sidewalls of the trench. A conductive material is disposed within the trench and is coupled to a lower portion of the workpiece.
Abstract:
A photodetector is formed in a semiconductor body. A hard mask grating is photolithographically formed on a surface of the semiconductor body. The semiconductor body is etched using the hard mask grating as a mask. The etching is performed down to a predetermined depth. An implantation is performed such that an anode or cathode of the photodetector that has been interrupted during the etching is re-formed.
Abstract:
Apparatus comprises an electronic display, a processor coupled to the electronic display and configured by software to divide the electronic display into first and second display portions, a frame member including at least two surround members and a divider member. The frame member is secured adjacent the electronic display so that the surround members provide a surround to at least two opposite edges of the electronic display and such that the first display portion of the electronic display is on an opposite side of the divider member to the second display portion of the electronic display, and wherein the processor is configured by software to control the display to provide a first image in the first display portion and a second image in the second display portion, the second image being independent of the first image.
Abstract:
Semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, a semiconductor device includes a workpiece having a buried layer disposed beneath a top portion thereof. A trench is disposed in the workpiece extending at least through the buried layer. At least one sinker contact is disposed in the top portion of the workpiece. The at least one sinker contact is proximate sidewalls of at least a portion of the trench and is adjacent the buried layer. An insulating material is disposed on the sidewalls of the trench. A conductive material is disposed within the trench and is coupled to a lower portion of the workpiece.
Abstract:
For the integration of an npn bipolar transistor with a hetero bipolar transistor, a placeholder layer is generated in a base region of the hetero bipolar transistor after structuring a collector structure for both types of transistors, wherein the placeholder layer is not present in a base region of the bipolar transistor. After generating the base of the bipolar transistor, the base of the bipolar transistor is covered, whereupon the placeholder layer is removed and the base of the hetero bipolar transistor is generated in the places where the placeholder layer has been removed. The emitter structure is again generated equally for both types of transistors so that an integrated circuit results which includes bipolar transistors and hetero bipolar transistors whose collector structures and/or whose emitter structures consist of identical production layers. Thus, space-saving and cost-effective integrated circuits may be produced benefiting from the advantages of both types of transistors.
Abstract:
A device for monitoring balanced two-wire bus lines and two-wire but interfaces has first, second and third comparison circuits for comparing the wire potentials with one another and with a fixed reference voltage, and two shift registers or counters as well as at least one pulse generator for deriving reset pulses from each change in sign of the potential comparison of the two bus conductors with one another. The shift registers or counters are respectively reset by the reset pulses. Result signals produced from the comparison of the bus potentials with a fixed reference voltage can be fed to the shift registers or counters for the purpose of shifting or incrementing said registers or counters respectively. The register length or number of counter stages can be selected as a function of a desired bit error tolerance depth. The device can be extended by a self-resetting system after temporary bus disturbances. The device is also programmable, and thereby universal, and because of an integration capability using standard technology and having a very low space requirement is suitable as a compilable standard cell for possible bus chip designs. The device is operable in cooperation with software routines of a decentral bus test system as a test receiver for analyzing bus disturbances.
Abstract:
A biaxially stretched polypropylene monofilm, wherein the surfaces of the two sides of the polypropylene monofilm have different roughnesses R.sub.Z, is employed as an insulation film for the production of capacitors. The smoother of the two surfaces of the polypropylene monofilm is substantially free from fibrils and pits, so that no flaws occur in a metal layer applied on metallization of this surface.